Lg Display Co., Ltd.

Seungcheol Oh

JinCheol Hong

Yangseok Jeong

Mangyu Park

Changhun Cho

Juhyun Oh

A display device and a method for driving the same are discussed. The display device includes a display panel including data lines, gate lines crossing the data lines, and pixels, and source driver integrated circuits (ICs) which are connected to a timing controller through data line pairs, recover control information of a control data packet input from the timing controller, and supply a data voltage to the data lines. The timing controller sets the number of control data packets transmitted in a horizontal blank period to be less than the number of control data packets transmitted in a period except the horizontal blank period. The source driver ICs read the number of control data packets based on start information transmitted prior to the control data packet.

Display device and method for driving the same

A liquid crystal display and a method of driving the same are provided. The liquid crystal display includes a first source drive IC group outputting a first feedback lock signal in response to one of a power voltage input through a first lock signal input terminal and a lock signal from the timing controller, a second source drive IC group outputting a second feedback lock signal in response to one of the power voltage input through a second lock signal input terminal, the lock signal from the timing controller, and a lock signal transferred from the first source drive IC group, and a comparator that compares the first feedback lock signal with the second feedback lock signal and supplies a comparison result to the timing controller.

Liquid crystal display and method of driving the same

A liquid crystal display and a method of driving the same are provided. The liquid crystal display includes a timing controller, N source drive integrated circuits (ICs), where N is an integer equal to or greater than 2, N pairs of data bus lines, each of which connects the timing controller to each of the N source drive ICs in a point-to-point manner, a lock check line that connects a first source drive IC of the N source drive ICs to the timing controller and cascade-connects the N source drive ICs to one another, and a feedback lock check line that connects a last source drive IC of the N source drive ICs to the timing controller.

Growing community of inventors

Goyang-si, South Korea

Seungcheol Oh