Micron Technology Incorporated

Seung Yeong Seo

Myung Ho Bae

Some embodiments include an integrated assembly having a second deck over a first deck. A true digit-line has a short first region along the first deck and a long second region along the second deck. A complementary digit-line has a long first region along the first deck and a short second region along the second deck. A first set of first memory cells is associated with the true digit-line. The first set includes a first subset along the short first region, a second subset along a portion of the long second region, and a third subset along another portion of the long second region. A routing region of the true digit-line extends between the second and third subsets of the first memory cells. A connection extends from the short first region to the routing region of the true digit-line.

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Boise, ID, United States of America

Seung Yeong Seo