Samsung Display Co., Ltd.

Seung Sok Son

Woo Geun Lee

Seul Ki Kim

Kap Soo Yoon

June Whan Choi

Seung Ha Choi

Seok Hwan Bang

Su Jung Jung

Jae-Hyun Park

Jae Hyun Lee

Bo Sung Kim

Jong-In Kim

Soo Jung Chae

Hye Jung Lee

Young Jae Jeon

Yeon Taek Jeong

Joon Geol Kim

Hee Jun Byeon

Keum Hee Lee

Soon Wook Hong

Dong Hoon Shin

Hyun Woong Baek

Hyun Seong Kang

Jung Ouck Ahn

Woo Bin Lee

Jung Kyoung Cho

A display device according to an embodiment includes: a substrate; a first conductive layer positioned on the substrate; a semiconductor layer positioned on the first conductive layer; a second conductive layer positioned on the semiconductor layer; an oxygen supply layer positioned under the second conductive layer, in contact with the second conductive layer, and having the same planar shape as the second conductive layer; and a light-emitting element connected to the second conductive layer, wherein the oxygen supply layer includes a metal oxide that includes one or more of indium, zinc, tin, or gallium, or alloys thereof.

Display device and manufacturing method thereof

A display device includes a base layer; a first pattern disposed on the base layer; an insulating layer disposed on the first pattern and including layers; and a second pattern disposed on the insulating layer. At least two of the layers of the insulating layer include a same material.

Display device having multiple insulating layers of same material

A display device includes a substrate, a first conductive layer on the substrate, the first conductive layer including a data signal line, a first insulating layer on the first conductive layer, a semiconductor layer on the first insulating layer, the semiconductor layer including a first semiconductor pattern, a second insulating layer on the semiconductor layer, and a second conductive layer on the second insulating layer, the second conductive layer including a gate electrode disposed to overlap the first semiconductor pattern, a transistor first electrode disposed to overlap a part of the first semiconductor pattern, wherein the transistor first electrode is electrically connected to the data signal line through a contact hole that penetrates the first and second insulating layers, and a transistor second electrode disposed to overlap another part of the first semiconductor pattern.

Display device

A display device includes a substrate and a transistor disposed on the substrate and including a semiconductor layer, wherein the semiconductor layer includes a mesh structure, and wherein a plurality of openings are formed in the semiconductor layer.

Display device having a semiconductor layer with a mesh structure

A display device includes a substrate having a display area and a pad area. A gate conductive layer disposed on the substrate includes a gate conductive metal layer and a gate capping layer. The gate conductive layer forms a gate electrode in the display area and a wire pad in the pad area that is exposed by a pad opening. An interlayer insulating film disposed on the gate conductive layer covers the gate electrode. A data conductive layer disposed on the interlayer insulating film in the display area includes source and drain electrodes. A passivation layer disposed on the data conductive layer covers the source and drain electrodes. A via layer is disposed on the passivation layer. A pixel electrode is disposed on the via layer. The pixel electrode is connected to the source electrode through a contact hole penetrating the via layer and the passivation layer.

Display device with gate conductive layer forming wire pad in pad area and method of fabricating the same

A thin film transistor array panel includes: a substrate; a gate line and a common voltage line electrically separated from each other and elongated parallel with each other on the substrate; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connection member on the second passivation layer and electrically separated from each other. The connection member is elongated in a horizontal direction parallel with the gate line and connects the common voltage line and the common electrode to each other.

Thin film transistor array panel and manufacturing method thereof

A thin film transistor array panel includes: a substrate; a gate line and a common voltage line on the substrate and electrically separated from each other; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connecting member on the second passivation layer and electrically separated from each other. A first contact hole and a second contact hole are defined in the first and second passivation layers. The pixel electrode and the drain electrode are connected to each other through the second contact hole. The connecting member and the common electrode are connected to each other through the first contact hole.

Thin film transistor array panel and method of manufacturing the same

A display substrate for a display device includes: a substrate which includes a light blocking region defining a plurality of pixel areas disposed in a matrix, each pixel area having a length extending in a second direction, and a width extending in a first direction; a color filter overlapping a portion of the each pixel area of the plurality of pixel areas; and an alignment layer disposed on the color filter. the color filter includes a first edge parallel to the second direction, and a second edge forming a predetermined angle with the first edge. The second edge is substantially parallel to an alignment direction of the alignment layer.

Display substrate and display device including the same

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Asan-si, South Korea

Seung Sok Son