Skhynix Inc.

Seung-Mo Noh

Guk-Cheon Kim

Yang-Kon Kim

Bo-Mi Lee

Ki-Seon Park

Won-Joon Choi

Jong-Koo Lim

Cha-Deok Dong

Jae-Hong Kim

Min-Suk Lee

Jae-Heon Kim

Chan-Sik Park

Choi-Dong Kim

Ku-Youl Jung

Jeong-Myeong Kim

Sung-Joon Yoon

Chi-Ho Kim

Won-joon Choi

Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.

Electronic device and method for fabricating the same

An electronic device and a method for fabricating the same are provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes a magnetic tunnel junction (MTJ) structure including: a free layer having a changeable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer sandwiched between the free layer and the pinned layer, wherein the free layer includes a CoFeAlB alloy.

Electronic devices and systems having semiconductor memory are provided. In one implementation, for example, an electronic device may include a substrate; an under layer disposed over the substrate and including conductive hafnium silicate; a free layer disposed over the under layer and having a variable magnetization direction; a tunnel barrier layer disposed over the free layer; and a pinned layer disposed over the tunnel barrier layer and having a pinned magnetization direction, and wherein the free layer includes: a first ferromagnetic material; a second ferromagnetic material having a coercive force smaller than that of the first ferromagnetic material; and an amorphous spacer interposed between the first ferromagnetic material and the second ferromagnetic material.

This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the pinned layer and the free layer; a magnetic correction layer located under the MTJ structure and operates to reduce an influence of a stray magnetic field generated by the pinned layer; and an under layer located under the magnetic correction layer and including a metal oxide layer.

Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: a free layer comprising CoFeGeB alloy, and having a changeable magnetization direction that is perpendicular to the free layer; a tunnel barrier layer positioned over the free layer, and configured for enabling electron tunneling; a pinned layer positioned over the tunnel barrier layer, and having a pinned magnetization direction that is perpendicular to the pinned layer; and a bottom layer positioned under the free layer, and having a B2 structure to improve a perpendicular magnetic crystalline anisotropy of the free layer.

This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory for storing data, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure comprising a free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer located under the MTJ structure, wherein the under layer may include: a first under layer including a silicon-based alloy; a second under layer including a metal; and a blocking layer interposed between the first under layer and the second under layer and including an amorphous material.

Electronic device

An electronic device is provided to include a semiconductor memory including a variable resistance element. The variable resistance element may include a variable resistance pattern including a first electrode layer, a variable resistance layer, and a second electrode layer that are sequentially stacked; and a switching assist structure spaced from a side wall of the variable resistance pattern to surround the variable resistance pattern and including multilayered conductive structures that are vertically spaced from one another.

An electronic device includes a semiconductor memory, wherein the semiconductor memory includes: a seed layer including conductive hafnium silicate; a first magnetic layer formed over the seed layer; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer.

Growing community of inventors

Icheon-si, South Korea

Seung-Mo Noh