Samsung Electronics Co., Ltd.

Seung-jung Lee

Jae-Hong Ko

Do-youn Kim

Jae-wook Kwon

Chang-Hwe Choi

In a liquid crystal display (LCD) panel driver with a self-masking function using a power-on reset signal, and in a method of driving the same, the LCD panel driver includes a power-on reset signal generation unit that generates a power-on reset signal in response to a supply voltage applied to a LCD panel; a latch unit that receives a start pulse signal instructing that source lines of the LCD panel be driven and generates first and second set signals for setting an initial value of an output signal of a flip-flop to be in a predetermined default logic level, in response to the power-on reset signal; and a counter unit that generates a start pulse masking signal by masking at least one pulse of the start pulse signal in response to the first and second set signals and the start pulse signal.

LCD panel driver with self masking function using power on reset signal and driving method thereof

A source driver includes a hold memory block, a pre-decoding block, a level shifting block and digital-to-analog (DAC) block. The hold memory block stores digital image data. The pre-decoding block generates a data code that includes at least one bit having a first logic level based on the digital image data and generates a plurality of enable signals based on the data code. The level shifting block performs level shifting of the data code based on the enable signals. The DAC block outputs a grayscale voltage that is selected based on the level shifted data code output from the level shifting block. A source driver module and a display device include a plurality of the source drivers.

Image data driving apparatus and method of reducing peak current

A driver integrated circuit (IC) for a liquid crystal display (LCD) has a double column structure. The driver IC includes a first shift register unit, a first data latch unit, first and second decoders, and first and second output buffers. The first data latch unit receives and stores first and second group channel data in response to a clock signal generated by the first shift register unit. The first decoder receives the first group channel data and outputs gamma voltages corresponding to the first group channel data. The second decoder receives the second group channel data and outputs gamma voltages corresponding to the second group channel data. The first and second output buffers are aligned along a long edge of the driver IC and buffer the corresponding gamma voltages to drive corresponding channels. The first shift register unit and the first data latch unit are shared by upper and lower blocks to process the first and second group channel data together.

LCD driver integrated circuit having double column structure

An output buffer with an improved slew rate and method thereof. The output buffer may include a differential amplifier, a controller and an output unit. The output buffer may generate a pull signal and a control signal based on received input and output signals. The controller may transition an output node to a control voltage in response to the control signal and a bias voltage. The output unit may maintain the first output signal between a given voltage and the control voltage based on the pull signal and the bias voltage.

Growing community of inventors

Seoul, South Korea

Seung-jung Lee