Skhynix Inc.

Hyundai Mobis Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Seung Jin Park

Chang Kyun Park

Young Sik Koh

Dong Hyun Lee

In Yong Jung

Yong Il Kwon

Min Byeong Lee

No Il Park

Yoon Soo Kim

Soo Jin Kim

Kyoung Jun Lee

Dong Jae Shin

Chang Ryul Jung

Sang Geun Bae

ChangHo Kim

A platoon driving control system of a vehicle includes a detector configured to detect an obstacle positioned in a front according to a driving direction of a vehicle included in a platoon; a processor; and a memory coupled to the processor and storing an algorithm that, when executed by the processor, causes the processor to: determine a braking strategy of the vehicle included in the platoon based on a driving speed of the platoon, and control a driving of the platoon based on the obstacle detected by the detector and the braking strategy.

Braking control for platoon driving control system and method of vehicle

A platoon driving control system of a vehicle includes a processor, a navigation, and a driving controller communicatively connected to one another. The processor is configured to estimate a charging amount of a power source that drives a driving device or an available driving distance of each vehicle included in a platoon. The navigation is configured to set a driving route based on a destination of the platoon and search for a charging station for the power source based on the set driving route. The processor is further configured to determine a charging strategy of the power source of the platoon based on the charging amount or the available driving distance of each vehicle, the driving route set by the navigation, and the searched charging station. The driving controller is configured to control driving of the platoon based on the driving route set by the navigation and the charging strategy.

Platoon driving control system and method of vehicle

A semiconductor system includes a first semiconductor device configured to output a clock and pattern data, configured to receive a strobe signal and output data, and configured to adjust a duty ratio of the strobe signal by comparing odd data and even data that are generated from the output data and the pattern data, in synchronization with the strobe signal and a second semiconductor device configured to store the pattern data in synchronization with the clock, configured to output the clock as the strobe signal by adjusting a duty ratio of the clock, and configured to output the stored pattern data as the output data.

Semiconductor system for performing a duty ratio adjustment operation

A platooning control method includes: determining whether a preceding vehicle, which is located in front of a host vehicle, has entered a slope section when a plurality of vehicles are moving on a road, acquiring longitudinal distance information between the host vehicle and the preceding vehicle using a Dead-Reckoning (DR) sensor of the host vehicle upon determining that the preceding vehicle has entered the slope section, and performing platooning control by the host vehicle with the plurality of vehicles in the slope section using the longitudinal distance information acquired by the DR sensor and speed information.

Platooning control method and system

An autonomous driving control system of a vehicle includes a processor, a navigation, and a driving controller communicatively connected to one another. The processor is configured to estimate a charging amount of a power source that drives a driving device of a vehicle. The navigation is configured to set a driving route based on a destination and to search for a charging station for the power source based on the set driving route. The processor is further configured to determine a charging strategy of the power source based on the estimated charging amount of the power source, the driving route set by the navigation, and the searched charging station. The driving controller is configured to control driving of the vehicle based on the driving route set by the navigation and the determined charging strategy.

Autonomous driving control system and method of vehicle

A memory system includes a memory device including an interface circuit and a semiconductor memory, and a controller to generate a command for controlling the memory device. The interface circuit receives the command from the controller; determines whether the command is for the semiconductor memory or the interface circuit; and when it is determined that the command is for the interface circuit, performs a blocking operation to block transfer of the command between the interface circuit and the semiconductor memory and performs an internal operation of the interface circuit. The internal operation includes a signal controlling operation, a training operation, a read operation, an on-die termination operation, a ZQ calibration operation, or a driving force control operation.

Memory system and operating method of the memory system

A storage device can control the input/output of data at a high frequency. The storage device includes a memory device and a memory controller for controlling the memory device, and providing the memory device with a command. The memory device includes a memory unit, and an interface chip for performing a training operation in response to the command. The interface chip generates a shift signal according to a first data strobe signal provided from the memory controller, and stores, based on the shift signal, training data provided from the memory controller.

Storage device and operating method thereof

A forward collision avoidance system of a vehicle includes a detector configured to detect an obstacle positioned ahead in a traveling direction of the vehicle; a processor; a memory coupled to the processor and storing an algorithm that, when executed by the processor, causes the processor to: estimate a gradient of a road on which the vehicle is traveling, and determine a braking strategy of the vehicle based on the estimated gradient, a position of the detected obstacle and a velocity of the vehicle; and a controller configured to control braking of the vehicle based on the braking strategy of the vehicle determined by the processor.

Forward collision avoidance system and method of vehicle

The present technology includes a memory system and a method of operating the memory system. The memory system includes a memory device including an interface circuit, the interface circuit storing first system data, and a semiconductor memory; and a controller configured to output a read enable signal and a first read command for the first system data to the memory device. The semiconductor memory transfers a data strobe signal to the interface circuit in response to the read enable signal, the interface circuit reads the first system data in response to the first read command and transmits the read first system data to the controller in synchronization with the data strobe signal.

Memory system capable of improving stability of a data read operation of interface circuit, and method of operating the memory system

An apparatus for implementing a lane change decision aid system (LCDAS) includes: a sensing unit sensing whether there is a target vehicle in adjacent zones, a rear zone, or a forward zone of a subject vehicle; a determination unit determining an activation condition for determining whether an LCDAS function is active/inactive and a warning condition for determining whether a warning of the LCDAS function is issued/un-issued, based on the sensing of the sensing unit; a warning unit issuing the warning to a driver based on the determination of the determination unit; and a control unit controlling the sensing unit, the determination unit, and the warning unit.

Apparatus and method for implementing LCDAS

The present technology includes a memory system and a method of operating the memory system. The memory system includes a memory device including an interface circuit and a semiconductor memory, and a controller configured to generate a command set in response to a host command and output the command set to the memory device. The interface circuit is configured to: receive the command set, transmit the received command set to the semiconductor memory, when the received command set corresponds to the semiconductor memory, perform a blocking operation so that the received command set is not transmitted to the semiconductor memory, when the received command set corresponds to the interface circuit, and perform an on-die termination operation, a ZQ calibration operation, or a driving force control operation of the interface circuit in response to the received command set corresponding to the interface circuit.

Memory system and method of operating the memory system

Provided is a method for operating an interface circuit of a memory device. The method includes receiving a command from a controller; determining whether the command is for a semiconductor memory or the interface circuit, the semiconductor memory operatively coupled to the interface circuit; and when it is determined that the command is for the interface circuit, performing a blocking operation to block transfer of the command between the interface circuit and the semiconductor memory and performing an internal operation of the interface circuit. The internal operation includes a signal controlling operation, a training operation, a read operation, an on-die termination operation, a ZQ calibration operation, or a driving force control operation.

Growing community of inventors

Gyeonggi-do, South Korea

Seung Jin Park