Samsung Electronics Co., Ltd.

Hyundai Motor Company

Dongjin Semichem Co., Ltd.

Seung Jin Kim

Wan Hee Hong

Sung Soo Yim

Kyung Min Lee

Sung Jun Lee

Seung Hyun Oh

Min Jung Kim

Byung-Hyun Lee

Hwa Su Lim

Sang Jae Park

Yoon Young Choi

Woo Jun Jung

Jae Hong Jung

Ji Hyun Kim

Jae Min Lee

Sang Woo Kim

Hyun Jin Kim

Ji Hun Kim

Wan Ho Kim

Jung Park

Ki Won Kim

Jun Ik Lee

Young Mok Kim

Gyu Sik Kim

Gwang Hui Lee

Byung Ki Han

Jae Seung Noh

Hyo Jung Roh

Jong Gab Park

A phase locked loop circuit and a semiconductor device are provided. The phased locked loop circuit includes a reference current generator configured to generate a summed compensation current in which at least one of a process change, a temperature change or a power supply voltage change are compensated and output the summed compensation current as a reference current, a current digital-to-analog converter configured to convert the reference current into a control current in accordance with a digital code and a voltage control oscillator configured to generate a signal based on the control current, wherein the summed compensation current is based on weighted-averaging a first type compensation current and a second type compensation current in response to at least one of the process change, the temperature change or the power supply voltage change.

Phase locked loop circuit and semiconductor device including the same

A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.

Ground-connected supports with insulating spacers for semiconductor memory capacitors and method of fabricating the same

A method of manufacturing a semiconductor device includes sequentially stacking a mold layer and a supporter layer on a substrate, forming a plurality of capacitor holes passing through the mold layer and supporter layer, forming a plurality of lower electrodes filling the capacitor holes, forming a supporter mask pattern having a plurality of mask holes on the supporter layer and the lower electrodes, and forming a plurality of supporter holes by patterning the supporter layer. Each of the plurality of lower electrodes has a pillar shape, and each of the mask holes is between four adjacent lower electrodes and has a circular shape.

Semiconductor device having supporter pattern

A clock generating circuit includes a first frequency multiplier configured to generate a second clock signal having a second frequency based on a first clock signal having a first frequency, and a second frequency multiplier configured to generate a third clock signal having a third frequency based on the second clock signal. The first frequency multiplier includes a circuit configured to control a duty cycle of the first clock signal, a delay circuit configured to receive the duty controlled clock signal, and delay the received signal based on a duty cycle of the second clock signal to output a first delay clock signal, and an XOR gate configured to perform an XOR computation using the duty controlled clock signal and the first delay clock signal to output the second clock signal. The second frequency is greater than the first frequency, and the third frequency is greater than the second frequency.

Clock generating circuit and wireless communication device including the same

Various examples of the present invention relate to an electronic device comprising: a graphic buffer for storing graphic information received from an application; a frame buffer for storing the graphic information to be displayed on a display; and a processor, wherein the processor is configured to: store, in the graphic buffer, first graphic information received from a first layer; store, in the frame buffer, second graphic information received from a second layer; store, in the frame buffer, the first graphic information stored in the graphic buffer; and simultaneously display the first graphic information and the second graphic information, stored in the frame buffer, through the display functionally connected with the processor. In addition, other examples identifiable through the specification are possible.

Method for reducing current consumption, and electronic device

A semiconductor device and a method for controlling amplitude of signal in the semiconductor device are provided. The semiconductor device comprises a signal generator configured to output a sinewave, a comparator configured to compare a magnitude of the sinewave with a magnitude of a reference signal at a first timing corresponding to a timing control signal and to output a comparison result, and a control signal adjustor configured to adjust one of the current control signal and a timing control signal depending on the comparison result of the comparator.

Semiconductor device and method for controlling amplitude of signal in the semiconductor device

An electronic device includes a first graphic composer that composes first graphic data associated with a layer of a first composition type, a second graphic composer that composes second graphic data associated with a layer of a second composition type different from the first composition type. The electronic device also includes a processor that sets a composition type of each of a plurality of layers associated with at least one application to the first or second composition type, composes first graphic data corresponding to a layer set to the first composition type using the first graphic composer, compose the composed graphic data in the frame buffer and second graphic data corresponding to a layer set to the second composition type using the second graphic composer, and display the composed graphic data through a display connected with the electronic device.

Electronic device for composing graphic data and method thereof

Provided is a composition for forming an organic anti-reflective coating layer used in a negative tone development, which not only enhance an adhesion to a photoresist while having a high refractive index and a high etch rate but also improve a pattern profile of undercut etc. The composition an isocyanurate compound containing at least one moiety which is represented by Formula 2; a polymer represented by Formula 3 and an organic solvent for dissolving the above-mentioned components. 

Composition for forming organic anti-reflective coating layer suitable for negative tone development

An electronic device is provided. The electronic device includes an input panel configured to periodically sense touch coordinates corresponding to a touch manipulation of a user; and a processor configured to periodically receive the touch coordinates from the input panel, calculate a variation of the touch coordinates based on the touch coordinates, change a reference value for determining movement of the touch manipulation based on the variation of the touch coordinates, and determine whether the touch manipulation moves, based on the reference value.

Input processing method and device

Automobile

Head lamp for an automobile

Rear fog lamp for an automobile

Growing community of inventors

Gyeonggi-do, South Korea

Seung Jin Kim