Globalfoundries Inc.

Seung-Hyun Rhee

Jongwook Kye

Mahbub Rashed

Suresh Venkatesan

Scott C Johnson

Subramani Kengeri

Marc Laurent Tarabbia

Yunfei Deng

Yuansheng Ma

Irene Y Lin

Chinh Nguyen

Jeff Kim

Rod Augur

Jason Eugene Stephens

Steven R Soss

Holger S Schuehrer

E Todd Ryan

David Doman

Ingolf Lorenz

James B Gullette

Larry Ho

James Benjamin Gullette

A semiconductor device includes a semiconductor substrate having a diffusion region. A transistor is formed within the diffusion region. A power rail is disposed outside the diffusion region. A contact layer is disposed above the substrate and below the power rail. A via is disposed between the contact layer and the power rail to electrically connect the contact layer to the power rail. The contact layer includes a first length disposed outside the diffusion region and a second length extending from the first length into the diffusion region and electrically connected to the transistor.

Semiconductor device having contact layer providing electrical connections

A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA layer is electrically connected to at least one of the source or the drain of the first transistor. A CB layer is electrically connected to at least one of the gates of the transistors and the CA layer.

Semiconductor device with transistor local interconnects

A semiconductor package is provided having reduced tensile stress. The semiconductor package includes a package substrate and a semiconductor die. The semiconductor die is coupled electrically and physically to the package substrate and includes a stress relieving layer incorporated therein. The stress relieving layer has a predetermined structure and a predetermined location within the semiconductor die for reducing tensile stress of the semiconductor package during heating and cooling of the semiconductor package.

Method and apparatus for reducing semiconductor package tensile stress

Growing community of inventors

Fishkill, NY, United States of America

Seung-Hyun Rhee