Samsung Electronics Co., Ltd.

Seung-Hun Shin

Doowon Kwon

Min-Soo Kim

Sang-Hoon Kim

Jin-ho Kim

June-mo Koo

Chang-rok Moon

Byung-jun Park

Jin-Wan An

Teak-Hoon Lee

Chang-Seong Jeon

Jongcheol Shin

Hyun-Tae Jung

Tae-Hun Lee

Sang-Tae Lee

Jae-Kyung Yoo

Ji-Hyuk Jang

Chang-Ho Hwang

A method of cutting a substrate including a device region and a scribe lane region includes selectively forming a passivation layer in the device region of the substrate, selectively forming a self-assembled monolayer on the passivation layer, and performing plasma cutting in the scribe lane region.

Method of cutting substrate and method of singulating semiconductor chips

An electronic device is provided. The electronic device includes a housing including a front plate, a back plate, and a side member surrounding a space between the front plate and the back plate. The side member includes a plurality of non-conductive portions and a conductive portion. The electronic device also includes a display module, and at least one wireless communication circuit. The electronic device also includes a printed circuit board (PCB). The camera assembly is exposed through a portion of the back plate. The camera assembly includes an image sensor mounted on the PCB, and a plurality of lenses. The camera assembly also includes a barrel that surrounds the plurality of lenses, and a camera bracket that surrounds at least part of the barrel. The camera assembly also includes a metal case that surrounds at least part of the camera assembly, and a shielding structure.

Camera assembly and electronic device including the same

An image sensor includes a substrate having a first surface opposing a second surface and a plurality of pixel regions. A photoelectric converter is included in each of the pixel regions, and a gate electrode is formed on the photoelectric converter. Also, a pixel isolation region isolates adjacent pixel regions. The pixel isolation region includes a first isolation layer coupled to a channel stop region. The channel stop region may include an impurity-doped region.

Image sensor and method of forming the same

Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.

Methods of fabricating image sensors including impurity layer isolation regions

In a method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), an epitaxial layer may be formed on a first substrate including a chip area and a scribe lane area. A first impurity layer may be formed adjacent to the first substrate by implanting first impurities into the epitaxial layer. A photodiode may be formed in the epitaxial layer on the chip area. A circuit element electrically connected to the photodiode may be formed on the epitaxial layer. A protective layer protecting the circuit element may be formed on the epitaxial layer. A second substrate may be attached onto the protective layer. The first substrate may be removed to expose the epitaxial layer. A color filter layer may be formed on the exposed epitaxial layer using the first impurity layer as an alignment key. A microlens may be formed over the color filter layer.

Method of manufacturing a CMOS image sensor

For fabricating an image sensor, an isolation structure is formed to define a first active region of a semiconductor substrate. A first transistor and a second transistor of a unit pixel are formed in the first active region. In addition, a threshold voltage lowering region is formed in a portion of the semiconductor substrate near a portion of the isolation structure abutting the second transistor in the first active region. The threshold voltage lowering region causes the second transistor to have a respective threshold voltage magnitude that is lower than for the first transistor. The threshold voltage lowering region is formed simultaneously with a passivation region in a second active region having a photodiode formed therein.

Fabrication of image sensor with improved signal to noise ratio

An image device and a method of fabricating the image device include a substrate pattern formed to define an opening and to include a portion of a photodiode for receiving light. Stacked metal interconnection patterns and an interlayer dielectric layer are formed beneath the substrate pattern. A height of the opening equals a height of the substrate pattern, such that an exposed portion of a top surface of the interlayer dielectric layer provides a bottom surface of the opening. An external connection electrode is positioned on the bottom surface of the opening.

Growing community of inventors

Yongin-si, South Korea

Seung-Hun Shin