Samsung Electronics Co., Ltd.

Seung-ho Jang

Jeong-Ho Lee

Joon-Hee Lee

Seung-Pyo Hong

Jae-il Lee

Young-jin Lee

Ju-Ho Son

Chul-woong Jang

Sung-Yeol Kim

In-ho Choi

Woon-sup Choi

Ho-sun Yoo

In-su Yang

Yi-Ju Roh

Young-ki Kwak

Hyun-Tae Gill

A field mounting-type test apparatus and method for enhancing competitiveness of a product by simulating various test conditions including a mounting environment for improving quality reliability of a memory device and by minimizing overall loss due to change in a mounting environment thus reducing testing time and cost. The field mounting-type test apparatus includes a mass storage device configured to store logic data simulating a mounting environment of a device under test (DUT) and a tester main frame configured to test the DUT using the logic data.

Field mounting-type test apparatus and method for testing memory component or module in actual PC environment

A display device capable of reducing afterimage, and an afterimage reduction method used by the display device. One or more afterimage reduction patterns having one or more opaque areas, and/or one or more semi-transparent areas and one or more non-opaque areas are stored in a storage unit. A composition unit outputs a final image composed of a displayed main image and afterimage reduction patterns output from the storage unit. A control unit causes afterimage reduction patterns selected by a user from the storage unit to be input to the composition unit, and a final image in which only pixels corresponding to opaque areas and/or semi-transparent areas in the main image are replaced by color of the opaque areas and/or semi-transparent areas in the afterimage reduction patterns to be output from the composition unit. Accordingly, it is possible to view a received main image while reducing afterimage using images of various patterns for afterimage reduction.

Display device capable of reducing afterimage and afterimage reduction method thereof

Automatic test equipment is capable of performing a high-speed test of semiconductor devices, with a low cost and high efficiency. The automatic test equipment (ATE) comprises: an ATE body configured to electrically test semiconductor devices; a field programmable gate array (FPGA) controlling drivers and comparators on the ATE; an accelerator connected to an output terminal of the FPGA and that doubles an operating frequency of the FPGA; and a decelerator connected to an output terminal of the FPGA and that converts an operating frequency of data transferred from the semiconductor device to the operating frequency of the FPGA.

Automatic test equipment capable of high speed test

Growing community of inventors

Cheonan-si, South Korea

Seung-ho Jang