Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Seung-Ha Choi

Sang-Gab Kim

Yu-Gwang Jeong

Hong-Kee Chin

Min-Seok Oh

Shin-Il Choi

Woo-Geun Lee

Kyoung-Jae Chung

Kap-Soo Yoon

Dong-Ju Yang

Young-Wook Lee

Do-Hyun Kim

Ki-Won Kim

Hye-Young Ryu

Pil-Sang Yun

Young-Joo Choi

Je-Hun Lee

Hyun Sook Kim

Jae-Hyoung Youn

Jung-Suk Bang

Ki-Yeup Lee

Jang-Soo Kim

Ki-Hun Jeong

Sung-Hoon Yang

Seung-Hwan Shim

Sho Yeon Kim

Dong-Hoon Lee

Jeong-Min Park

Hi-Kuk Lee

Byeong-Beom Kim

Joo-han Kim

Ho-Jun Lee

Eun-Guk Lee

Woong-Kwon Kim

Yong-Mo Choi

Doo-Hee Jung

Yun-Jong Yeo

Byung Hwan Chu

Eun Hye Park

Bong-Kyu Shin

Chang-Oh Jeong

Sang Gab Kim

Jae-Ho Choi

Jin-Won Lee

Bong-Kyun Kim

Shi-Yul Kim

Jong-Hyun Choung

Myung-Kwan Ryu

Shin Il Choi

Suk-Won Jung

Kyoung Seok Son

Hong Sick Park

Joo-Ae Youn

Su Bin Bae

Ji-Young Park

Yang-Ho Bae

Yoon-Ho Kang

Sung-Haeng Cho

Yu Gwang Jeong

Hee-Jun Byeon

Eun-Hye Park

Byung-Hwan Chu

Eok-Su Kim

Sho-Yeon Kim

Chang-Ho Jeong

A thin film transistor substrate includes a gate electrode, a channel layer overlapping the gate electrode, a source electrode overlapping the channel layer, a drain electrode overlapping the channel layer and the source electrode, and a spacer disposed between the source electrode and the drain electrode.

Thin film transistor substrate and method of manufacturing a thin film transistor substrate

A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

Thin film transistor panel having an etch stopper on semiconductor

A thin film transistor array panel includes: a gate line disposed on a substrate and including a first connection member of a gate driver region and a gate electrode of a display area, a gate insulating layer disposed on the substrate and having a first contact hole exposing the first connection member, a semiconductor layer disposed on a region of the gate insulating layer, a data line disposed on the gate insulating layer and the semiconductor layer and including a drain electrode, a source electrode, and a second connection member connected to the first connection member through the first contact hole, a passivation layer disposed on the data line, the source electrode, the drain electrode, and the second connection member, and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode. A horizontal width of the first contact hole ranges from 1 to 2 &#x3bc;m.

Thin film transistor array panel and method of manufacturing the panel

Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.

Method of manufacturing a display substrate using two etch masks

A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.

Thin film transistor display panel and manufacturing method of the same

A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate; a gate line positioned on the substrate and including a gate electrode; a gate insulating layer positioned on the gate line; an oxide semiconductor layer positioned on the substrate; a source electrode and a drain electrode positioned on the oxide semiconductor layer; a first insulating layer positioned on the source electrode and the drain electrode and including a first contact hole; a data line positioned on the first insulating layer and intersecting the gate line; and a pixel electrode over the first insulating layer. The source electrode and the drain electrode each comprise a metal oxide. The data line is electrically connected to the source electrode through the first contact hole.

Thin film transistor, thin film transistor array panel, and method of manufacturing a thin film transistor array panel

A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

Thin film transistor array substrate and method of fabricating the same

Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Method for manufacturing a display panel

Disclosed are a thin film transistor and a method of forming the thin film transistor, wherein the thin film transistor includes a gate electrode, an oxide semiconductor pattern, a first gate insulating layer pattern interposed between the gate electrode and the oxide semiconductor pattern, wherein the first gate insulating layer pattern has an island shape or has two portions of different thicknesses from each other, a source electrode and a drain electrode electrically connected to the oxide semiconductor pattern, wherein the source electrode and the drain electrode are separated from each other, and a first insulating layer pattern placed between the source electrode and drain electrode and the oxide semiconductor pattern, wherein the first insulating layer pattern partially contacts the source electrode and drain electrode and the first gate insulating layer pattern, and wherein the first insulating layer is enclosed by an outer portion.

Thin film transistor and method of forming the same

Display substrate, display device, and method of manufacturing the display substrate

In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

Display substrate and method of manufacturing the display substrate

Growing community of inventors

Siheung-si, South Korea

Seung-Ha Choi