Skhynix Inc.

Korea Institute of Science and Technology

Seung-Chan Kim

Sang-Hoon Lee

Saeng-Hwan Kim

Hyeng-Ouk Lee

Sung Chul Kang

Dongseok Ryu

Dong-Soo Kwon

Tae-Heon Yang

Gi-Hun Yang

Chong Hui Kim

YongKwun Lee

Provided is a periodic signal generation circuit including: a clock generation unit suitable for generating first to Nclocks which have a basic period and have a phase increasing sequentially by a time interval obtained by dividing the basic period by 'N'; a pulse generation unit suitable for generating first to Nperiodic pulses having an equal pulse width and having a phase increasing sequentially by a time interval obtained by dividing the basic period by 'N' by combining two or more clocks among the first to Nclocks; and a periodic signal generation unit suitable for generating a periodic signal by combining one or more periodic pulses among the first to Nperiodic pulses depending on combination information.

Circuit for generating periodic signal and memory device including same

A semiconductor memory device includes an oscillating signal generation section suitable for generating an oscillation signal oscillating with a period, which is defined by a predetermined temperature-period function, a period control section suitable for controlling the period of the oscillation signal according to a combination of two or more predetermined temperature-period functions, which are different from one another, in response to a refresh characteristic information, and a memory cell array suitable for performing a refresh operation in response to the oscillation signal.

Semiconductor memory device and operating method thereof

An oscillator includes a comparison means suitable for generating a comparison signal by comparing an internal voltage of an internal node with a reference voltage; an inverting unit suitable for inverting the comparison signal and transmitting the inverted comparison signal to an output node; a pull-up driving unit suitable for pull-up driving the internal node in response to the voltage of the output node; a discharge unit suitable for discharging the internal node; and a gate coupled between the internal node and the discharge unit, and turned on/off in response to the voltage of the output node, wherein at least part of a capacitive load included in the oscillator is electrically coupled to the internal node.

Oscillator and memory device including the same

A tactile display apparatus includes a plurality of stimulation pins in contact with a skin; an operating unit for vertically moving the stimulation pins; and a housing accommodating the stimulation pins and the operating unit, the housing having an opening in one surface thereof such that the stimulation pins protrude outward. Here, the plurality of stimulation pins are arranged such that a contact area occupied by front ends of the stimulation pins is smaller than an area occupied by rear ends of the stimulation pins.

Tactile display apparatus and method thereof

Growing community of inventors

Gyeonggi-do, South Korea

Seung-Chan Kim