Samsung Electronics Co., Ltd.

Pusan National University

Seung Bo Shim

Doug Yong Sung

Yong Woo Lee

Young Jin Noh

Ji Soo Im

Peter Byung H Han

Nam Kyun Kim

Cheon Lee

Masato Horiguchi

Hyeong Mo Kang

Ju Ho Lee

Sang-Ho Lee

Sung-Il Cho

Ho-Jun Lee

Hyuk Kim

Kyung-Sun Kim

Jeon Il Lee

Won Young Choi

Naohiko Okunishi

Jae Myung Choe

Kyung Sun Kim

Sang Min Jeong

Yoong Chung

Sun Taek Lim

Kang Min Jeon

Myung Sun Choi

Nam Jun Kang

Jee Hun Jeong

Sung Hwan Cho

Ju-Hong Cha

Seung Han Baek

Plasma processing equipment includes a chuck stage for supporting a wafer and including a lower electrode, an upper electrode disposed on the chuck stage, an AC power supply which applies first to third signals having different magnitudes of frequencies to the upper electrode or the lower electrode, a dielectric ring which surrounds the chuck stage, an edge electrode located within the dielectric ring, and a resonance circuit connected to the edge electrode. The resonance circuit includes a filter circuit which allows only the third signal among the first to third signals to pass, and a series resonance circuit connected in series with the filter circuit and having a first coil and a first variable capacitor connected in series and grounded.

Plasma processing equipment

A plasma etching apparatus may include a first source electrode, a first bias electrode, and a second bias electrode configured to generate a plasma by supplying energy to a process gas injected into a chamber; and a controller. The controller may be configured to supply a first high-frequency RF power, a first low-frequency RF power, and a second low-frequency RF power to the chamber during a first period from a first time to a second time; ramp down and turn off the first high-frequency RF power to the chamber during a second period from the second time to a third time; and ramp down and turn off the first low-frequency RF power to the chamber during a third period from the second time to a fourth time different from the third time. The third period may be smaller than ½ of the first period and greater than the second period.

Plasma etching apparatus and method for operating the same

An inductively coupled plasma processing apparatus includes a lower chamber providing a space for a substrate, a high-frequency antenna that generates inductively coupled plasma in the lower chamber, dielectric windows disposed between the lower chamber and the high-frequency antenna, metal windows alternatingly disposed between the dielectric windows, and gas inlet pipes disposed in each of the metal windows, wherein each of the gas inlet pipes includes nozzles that introduce gases to the lower chamberamber.

Inductively coupled plasma processing apparatus

A plasma processing apparatus includes; a chamber, a lower electrode disposed within the chamber and including a lower surface and an opposing upper surface configured to seat a wafer, an RF rod disposed on the lower surface of the lower electrode and extending in a vertical direction. The RF plate includes a first portion contacting the lower surface of the lower electrode, a second portion protruding from the first portion towards the RF rod, and a third portion extending from the second portion to connect the RF rod. A grounding electrode is spaced apart from the RF plate and at least partially surrounds a side wall of the RF rod and a side wall of the second portion of the RF plate. The grounding electrode includes a first grounding electrode facing each of the side wall of the RF rod and the second portion of the RF plate, and a second grounding electrode at least partially surrounding the first grounding electrode, and configured to horizontally rotate.

Plasma processing apparatus and method of fabricating semiconductor device using same

A semiconductor manufacturing device includes a plasma chamber, a source power supply, and first and second bias power supplies. The source power supply applies a first source voltage to the plasma chamber at a first time and a second source voltage to the plasma chamber at a second time. The first bias power supply applies a first turn-on voltage to the plasma chamber at the first time and a first turn-off voltage to the plasma chamber at the second time. The second bias power supply applies a second turn-off voltage to the plasma chamber at the first time and a second turn-on voltage to the plasma chamber at the second time. The plasma chamber forms plasmas of different conditions from a gas mixture in the plasma chamber based on the source, turn-on, and turn-off voltages.

Semiconductor manufacturing device and method of operating the same

Provided are a plasma treatment apparatus and a method of fabricating semiconductor device using the same. The plasma treatment apparatus includes a chamber which provides a plasma treatment space, a bottom electrode disposed in the chamber and supports a wafer, a top electrode disposed in the chamber facing the bottom electrode, a source power source which supplies a source power output of a first frequency to the bottom electrode, a bias power source which supplies a bias power output of a second frequency different from the first frequency to the bottom electrode, and a pulse power source which applies a pulse voltage to the bottom electrode, wherein the bias power output is a bias voltage which is pulse-modulated to a first voltage level in a first time section and pulse-modulated to a second voltage level in a second time section and is applied to the bottom electrode.

Plasma treatment apparatus and method of fabricating semiconductor device using the same

A plasma processing apparatus including an electrostatic chuck supporting a wafer; a focus ring disposed to surround an outer circumferential surface of the wafer; an insulation ring disposed to surround an outer circumferential surface of the focus ring; and an edge ring supporting lower portions of the focus ring and the insulation ring, the edge ring being spaced apart from the electrostatic chuck and surrounding an outer circumferential surface of the electrostatic chuck; wherein the edge ring includes a flow channel containing a fluid therein.

Plasma processing apparatus

An electronic device includes a housing comprising a first plate, a second plate, and a side member, a printed circuit board arranged inside the housing and comprises a first surface, a second surface, and at least one side surface t, a first electronic component mounted on the first surface, a second electronic component mounted on the second surface, a first shield frame formed on the first surface and has a first opening, a second shield frame formed on the second surface and has a second opening, and a first shield cover comprising a first cover part and a first side part. The first cover part is supported by the first shield frame and covers the first electronic component. The first side part extends from the first cover part to the second shield frame and is covers the printed circuit board, the first opening, and a portion of the second opening.

Shield can structure

Growing community of inventors

Seoul, South Korea

Seung Bo Shim