Samsung Electronics Co., Ltd.

Seung-Bin You

Yong-Hee Lee

Yong-Jin Cho

Wang-Seup Yeum

Bong-Joo Kim

Chun Kyun Seok

Jae-Jin Park

An audio amplifier includes a compensation unit, an output unit and a calibration unit. The compensation unit generates a compensation signal based on a digital input signal, a digital reference code, a mode signal and a digital approximation code. The output unit generates an output signal based on the compensated input signal. The calibration unit generates the digital approximation code based on the output signal and the mode signal. The digital approximation code includes a plurality of bits that are generated sequentially.

Audio amplifier

A half-bridge three-level pulse width modulation (PWM) amplifier includes a prescaling unit, a PWM generator configured to convert the input signal to a three-level PWM signal having a first level, a second level and a reference level and an output stage. The prescaling unit scales an input signal according to at least one gain value to provide a scaled signal. The PWM generator varies the width of pulses having the first level and varies the width of pulses having a second level based on the scaled signal. The output stage drives an output node to a level of a first power supply voltage, a second power supply voltage or a third power supply voltage based on the three-level PWM signal. The output node is connected to a load. The magnitude of the at least one gain value compensates for variations of power supply voltages.

Half-bridge three-level PWM amplifier and audio processing apparatus including the same

A digital amplifier, a reference voltage generator for reducing a DC component of an amplified pulse width modulated signal of a digital amplifier, and a method of reducing a DC component of an amplified pulse width modulated signal applied to an input node of a load are described in this disclosure. The digital amplifier includes a pulse width modulation signal generator receiving an input signal and generating an amplified pulse width modulated signal, a filter filtering the amplified pulse width modulated signal and providing the filtered amplified pulse width modulated signal to an input node of a load, and a reference voltage generator providing a reference voltage to a reference node of the load to reduce a DC component of the filtered amplified pulse width modulated signal provided to the input node of the load.

Method, apparatus and system for reducing DC coupling capacitance at switching amplifier

In a method of interfacing a high-speed signal, a series of digital signals are received from a transmitter in response to a clock signal. The received digital signal is coded based on a K-L level pulse amplitude modulation system in response to the clock signal, wherein K and L are natural numbers and K&#x2260;L. The received digital signal is repeatedly coded and the coded digital signal is transferred to a receiver. As a result, crosstalk between adjacent channels may be reduced.

Method of interfacing a high speed signal

A class D amplifier includes a driver circuit and a reset circuit. The driver circuit is configured to amplify a PWM (pulse width modulation) signal to generate an amplified PWM signal. The reset circuit applies a predetermined voltage at an input of the driver circuit for a time period after a power supply voltage is applied or before the power supply voltage is deactivated, for eliminating pop-up noise.

Growing community of inventors

Seongnam-si, South Korea

Seung-Bin You