Novellus Systems Incorporated

Lam Research Corporation

Seshasayee Varadarajan

Steven T Mayer

Jonathan David Reid

Bryan L Buckalew

Bart Jan Van Schravendijk

Mandyam Sriram

Jon Henri

Zhian He

James Samuel Sims

Ramesh Chandrasekharan

Patrick A Van Cleemput

George Andrew Antonelli

Robert Rash

David Charles Smith

Shantinath Ghongadi

Evan E Patton

Andrew John McKerrow

Jennifer O'Loughlin

Kousik Ganesan

Tariq Majid

Jeff Hawkins

Joshua Collins

Jingbin Feng

Hanna Bamnolker

Gary B Lind

Ananda K Banerji

Qingguo Wu

Dinesh S Kalakkad

Adrien Lavoie

Shankar Swaminathan

Artur Kolics

Hu Kang

Frank Loren Pasquale

Pramod Subramonium

Haiying Fu

Chloe Baldasseroni

Sirish K Reddy

Jennifer Leigh Petraglia

Richard S Hill

Praveen Nalla

Vishwanathan Rangarajan

Aaron R Fellis

Kathryn Merced Kelchner

John H Sukamto

Seyang Park

Griffin John Kennedy

Brian Evans

Glenn Ibarreta

Tony Xavier

Tuan Anh Nguyen

Dennis Michael Hausmann

Bhadri N Varadarajan

Purushottam Kumar

Thomas Anand Ponnuswamy

Jun Qian

Edward J Augustyniak

Patrick G Breiling

Akhil N Singhal

Yukinori Sakiyama

R Marshall Stowell

Paul Franzen

Novy Sastrawati Tjokro

Saangrut Sangplung

Timothy Mark Archer

Gorun Butail

Jian Zhou

Bryan Pennington

Natalia V Doubina

Basha Sajjad

Andrew J McCutcheon

Douglas A Preston

Gerald B Feldewerth

Thomas Tan Vu

David Sauer

Anita Kang

Trung T Le

Patrick Breling

Jennifer O'Ioughlin

Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Deposition of films using molybdenum precursors

Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiOand SiN can be selectively etched using a plasma formed in an H-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiOis deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.

Method to create air gaps

Atomic layer deposition of metal films

Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiOand SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiOis deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100&#xb0; C.

Provided herein are methods and apparatuses for filling features metal-containing materials. One aspect of the disclosure relates to a method for filling structures with a metal-containing material, the method including: providing a structure to be filled with a metal-containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to one or more alternating reducing agent (e.g. hydrogen (H2)) dose/inert gas purge pulses pulse followed by exposure to one or more alternating metal precursor dose pulses and inert gas purge pulses. The metal may be tungsten (W) or molybdenum (Mo) in some embodiments. In some embodiments, the structure is a partially fabricated (3-D) NAND structure. Apparatuses to perform the methods are also provided.

Method of depositing tungsten and other metals in 3D NAND structures

Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiOand SiN can be selectively etched using a plasma formed in an H-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiOis deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100&#xb0; C.

Disclosed are methods of and apparatuses and systems for depositing a film in a multi-station deposition apparatus. The methods may include: (a) providing a substrate to a first station of the apparatus, (b) adjusting the temperature of the substrate to a first temperature, (c) depositing a first portion of the material on the substrate while the substrate is at the first temperature in the first station, (d) transferring the substrate to the second station, (e) adjusting the temperature of the substrate to a second temperature, and (f) depositing a second portion of the material on the substrate while the substrate is at the second temperature, such that the first portion and the second portion exhibit different values of a property of the material. The apparatuses and systems may include a multi-station deposition apparatus and a controller having control logic for performing one or more of (a)-(f).

Suppressing interfacial reactions by varying the wafer temperature throughout deposition

An electroplating apparatus for filling recessed features on a semiconductor substrate includes a vessel configured to maintain a concentrated electroplating solution at a temperature of at least about 40&#xb0; C., wherein the solution would have formed a precipitate at 20&#xb0; C. This vessel is in fluidic communication with an electroplating cell configured for bringing the concentrated electrolyte in contact with the semiconductor substrate at a temperature of at least about 40&#xb0; C., or the vessel is the electroplating cell. In order to prevent precipitation of metal salts from the electrolyte, the apparatus further includes a controller having program instructions for adding a diluent to the concentrated electroplating solution in the vessel to avoid precipitation of a salt from the concentrated electroplating solution in response to a signal indicating that the electrolyte is at risk of precipitation.

Electrolyte concentration control system for high rate electroplating

A showerhead in a semiconductor processing apparatus can include faceplate through-holes configured to improve the flow uniformity during atomic layer deposition. The showerhead can include a faceplate having a plurality of through-holes for distributing gas onto a substrate, where the faceplate includes small diameter through-holes. For example, the diameter of each of the through-holes can be less than about 0.04 inches. In addition or in the alternative, the showerhead can include edge through-holes positioned circumferentially along a ring having a diameter greater than a diameter of the substrate being processed. The showerhead can be a low volume showerhead and can include a baffle proximate one or more gas inlets in communication with a plenum volume of the showerhead. The faceplate with small diameter through-holes and/or edge through-holes can improve overall film non-uniformity, improve azimuthal film non-uniformity at the edge of the substrate, and enable operation at higher RF powers.

Low volume showerhead with faceplate holes for improved flow uniformity

A method of depositing ALD films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma such that aluminum-rich byproducts are formed on the ceramic surfaces, (b) depositing a conformal halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces so as to cover the aluminum-rich byproducts, (c) depositing a pre-coating on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film on the semiconductor substrate supported on the ceramic surface of the pedestal.

Method for depositing ALD films using halide-based precursors

A method of depositing silicon nitride films on semiconductor substrates processed in a micro-volume of a plasma enhanced atomic layer deposition (PEALD) reaction chamber wherein a single semiconductor substrate is supported on a ceramic surface of a pedestal and process gas is introduced through gas outlets in a ceramic surface of a showerhead into a reaction zone above the semiconductor substrate, includes (a) cleaning the ceramic surfaces of the pedestal and showerhead with a fluorine plasma, (b) depositing a halide-free atomic layer deposition (ALD) oxide undercoating on the ceramic surfaces, (c) depositing a precoating of ALD silicon nitride on the halide-free ALD oxide undercoating, and (d) processing a batch of semiconductor substrates by transferring each semiconductor substrate into the reaction chamber and depositing a film of ALD silicon nitride on the semiconductor substrate supported on the ceramic surface of the pedestal.

Method for depositing metals free ald silicon nitride films using halide-based precursors

Methods for depositing film on substrates are provided. In these embodiments, the substrates are processed in batches. Due to changing conditions within a reaction chamber as additional substrates in the batch are processed, various film properties may trend over the course of a batch. The methods herein can be used to address the trending of film properties over the course of a batch. More specifically, film property trending is minimized by changing the amount of RF power used to process substrates over the course of the batch. Such methods are sometimes referred to as RF compensation methods.

Method for RF compensation in plasma assisted atomic layer deposition

Methods of depositing silicon nitride encapsulation layers by atomic layer deposition over memory devices including chalcogenide material are provided herein. Methods include using iodine-containing silicon precursors and depositing thermally using ammonia or hydrazine as a second reactant, or iodine-containing silicon precursors and depositing using a nitrogen-based or hydrogen-based plasma.

Method for encapsulating a chalcogenide material

A method for providing an electroless plating over at least one copper containing layer is provided. Surfaces of the at least one copper containing layer are sealed by selectively depositing a sealing layer of catalytically active metal on the at least one copper containing layer. The sealing layer is exposed to an electroless deposition bath that is more reactive to the catalytically active metal than to the at least one copper containing layer to provide an electroless deposition on the sealing layer.

Two-step deposition with improved selectivity

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Lake Oswego, OR, United States of America

Seshasayee Varadarajan