Novellus Systems Incorporated

Lam Research Corporation

Sesha Varadarajan

Adrien Lavoie

Shankar Swaminathan

Frank Loren Pasquale

Ted Minshall

Jonathan David Reid

David Charles Smith

Edward J Augustyniak

Karl Frederick Leeser

Douglas L Keil

Hu Kang

Jun Qian

Chloe Baldasseroni

Jennifer Leigh Petraglia

Andrew Duvall

Mohamed Sabri

Saangrut Sangplung

Cody Barnett

Ugur Emekli

Steven T Mayer

Bart Jan Van Schravendijk

Michal Danek

Dennis Michael Hausmann

Bryan L Buckalew

Jon Henri

James Samuel Sims

Eric G Webb

Jeffrey C Benzing

Tariq Majid

John H Sukamto

Bart K Van Schravendijk

Jason Daejin Park

Naohiro Shoda

Andrew Antonelli

Margolita M Pollack

A substrate processing system includes: a processing chamber defining a reaction volume; a showerhead including: a stem portion having one end connected adjacent to an upper surface of the processing chamber; and a base portion connected to an opposite end of the stem portion and extending radially outwardly from the stem portion, where the showerhead is configured to introduce gas into the reaction volume; a plasma generator configured to selectively generate RF plasma in the reaction volume; and a collar arranged around the stem portion of the showerhead between the base portion of the showerhead and the upper surface of the processing chamber. The collar includes one or more holes to supply purge gas from an inner cavity of the collar to between the base portion of the showerhead and the upper surface of the processing chamber.

Systems and methods for suppressing parasitic plasma and reducing within-wafer non-uniformity

A substrate processing system for depositing film on a substrate includes a processing chamber defining a reaction volume. A showerhead includes a stem portion having one end connected adjacent to an upper surface of the processing chamber. A base portion is connected to an opposite end of the stem portion and extends radially outwardly from the stem portion. The showerhead is configured to introduce at least one of process gas and purge gas into the reaction volume. A plasma generator is configured to selectively generate RF plasma in the reaction volume. An edge tuning system includes a collar and a parasitic plasma reducing element that is located around the stem portion between the collar and an upper surface of the showerhead. The parasitic plasma reducing element is configured to reduce parasitic plasma between the showerhead and the upper surface of the processing chamber.

A substrate processing system for depositing film on a substrate includes a processing chamber defining a reaction volume and including a substrate support for supporting the substrate. A gas delivery system is configured to introduce process gas into the reaction volume of the processing chamber. A plasma generator is configured to selectively generate RF plasma in the reaction volume. A clamping system is configured to clamp the substrate to the substrate support during deposition of the film. A backside purging system is configured to supply a reactant gas to a backside edge of the substrate to purge the backside edge during the deposition of the film.

Systems and methods for reducing backside deposition and mitigating thickness changes at substrate edges

A method and apparatus for conformally depositing a dielectric oxide in high aspect ratio gaps in a substrate is disclosed. A substrate is provided with one or more gaps into a reaction chamber where each gap has a depth to width aspect ratio of greater than about 5:1. A first dielectric oxide layer is deposited in the one or more gaps by CFD. A portion of the first dielectric oxide layer is etched using a plasma etch, where etching the portion of the first dielectric oxide layer occurs at a faster rate near a top surface than near a bottom surface of each gap so that the first dielectric oxide layer has a tapered profile from the top surface to the bottom surface of each gap. A second dielectric oxide layer is deposited in the one or more gaps over the first dielectric oxide layer via CFD.

Conformal film deposition for gapfill

Apparatus and methods for depositing copper on tungsten are presented. The invention finds particular use in the semiconductor industry for depositing copper seed layers onto fields or through silicon vias having tungsten barrier layers, both reducing cost and complexity of existing methods.

Methods and apparatus for depositing copper on tungsten

A plasma-enhanced chemical vapor deposition (PECVD) process including plasma particle extraction is described. Charged particles suspended in discharge volume are moved together with a plasma and can then be flushed away. The particle extraction process reduces unwanted particles on the wafer after deposition and reduces total process time. In some embodiments, the process can involve powering an electrode in the process chamber located away from the wafer. This electrode can be powered up as the main deposition electrode is powered down.

Plasma particle extraction process for PECVD

A method for forming a silicon-based dielectric film on a substrate with a single deposition process operation using pulsed plasma enhanced chemical vapor deposition (PECVD) wherein the high frequency radio frequency power of the plasma is pulsed, allows enhanced control, efficiency and product quality of the PECVD process. Pulsing the high frequency RF power of the plasma reduces the deposited film thickness per unit time the high frequency RF power of the plasma is on. This yields silicon-based dielectric films that are both thin and conformal.

Method for improving process control and film conformality of PECVD film

A negative bias is applied to an integrated circuit wafer immersed in an electrolytic plating solution to generate a DC current. After about ten percent to sixty percent of the final layer thickness has formed in a first plating time, biasing is interrupted during short pauses during a second plating time to generate substantially zero DC current. The pauses are from about 2 milliseconds to 5 seconds long, and typically about 10 milliseconds to 500 milliseconds. Generally, about 2 pauses to 100 pauses are used, and typically about 3 pauses to 15 pauses. Generally, the DC current density during the second plating time is greater than the DC current density during the initial plating time. Typically, the integrated circuit wafer is rotated during electroplating. Preferably, the wafer is rotated at a slower rotation rate during the second plating time than during the first plating time.

Electroplating using DC current interruption and variable rotation rate

Electroplating methods using an electroplating bath containing metal ions and a suppressor additive, an accelerator additive, and a leveler additive, together with controlling the current density applied to a substrate, avoid defects in plated films on substrates having features with a range of aspect ratios, while providing good filling and thickness distribution. The methods include, in succession, applying DC cathodic current densities optimized to form a conformal thin film on a seed layer, to provide bottom-up filling, preferentially on features having the largest aspect ratios, and to provide conformal plating of all features and adjacent field regions. Including a leveling agent in the electroplating bath produces films with better quality after subsequent processing.

Electroplating process for avoiding defects in metal features of integrated circuit devices

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Lake Oswego, OR, United States of America

Sesha Varadarajan