Hitachi, Ltd.

Hitachi Ulsi Systems Co., Ltd.

Seryung Park

Keiichi Higeta

Takashi Koba

Naoyuki Anan

Mikiko Sakai

A circuit system is provided capable of improving the throughput thereof by eliminating the operational constraint that if the operating frequency of a content addressable memory is lower than the operating frequency of a system LSI, two system clocks should be provided, or the higher frequency should be synchronized with the slower system clock. A clock control circuit () for down-converting an internal clock (&#x3a6;) of a LSI () is provided, and a control signal whose frequency is made lower is used to operate a content addressable memory circuit ().

Growing community of inventors

Akishima, Japan

Seryung Park