Lsi Corporation

Sergey Y Gribok

Alexander Andreev

Vojislav Vukovic

A system for, and method of, assigning code blocks to constituent decoding units in a turbo decoding system having parallel decoding units. In one embodiment, the method includes: (1) representing the turbo decoding system as a resource diagram rectangle, (2) representing the code blocks as code block rectangles, (3) mapping the code block rectangles into the resource diagram rectangle and (4) assigning the code blocks to the constituent decoding units based on the mapping.

System and method for assigning code blocks to constituent decoder units in a turbo decoding system having parallel decoding units

A multi-byte cyclic redundancy check (CRC) calculation circuit and a method of calculating a multi-byte CRC. In one embodiment, the circuit includes: (1) a plurality of modules each configured to receive remainder bits in first inputs thereof and different numbers of portions of an input message in second inputs thereof and compute candidate CRC bits based thereon, (2) a storage element configured to receive output bits from one of the plurality of modules and provide the output bits to the first inputs as the remainder bits and (3) a multiplexer coupled to first outputs of the plurality of modules and configured to select from among the candidate CRC bits to yield a CRC for the input message.

Multi-byte cyclic redundancy check calculation circuit and method of operating the same

A system for, and method of, assigning code blocks to constituent decoding units in a turbo decoding system having parallel decoding units. In one embodiment, the system includes: (1) a resource model generator configured to generate a model that represents the constituent decoding units and memories thereof along two dimensions, (2) a decoding unit number calculator associated with the resource model generator and configured to determine, for each of the code blocks, a number of the constituent decoding units to use to decode subblocks of each of the code blocks, (3) a rectangle mapper associated with the decoding unit number calculator and configured to generate a mapping in which the code blocks are mapped to the model and (4) a code block assigner associated with the rectangle mapper and configured to assign the subblocks of each code block to the constituent decoding units in accordance with the mapping.

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San Jose, CA, United States of America

Sergey Y Gribok