Semiconductor Components Industries, LLC

Micron Technology Incorporated

Aptina Imaging Corporation

Sergey Velichko

Gennadiy A Agranov

Michael J Dorough

Tomas Geurts

Robert G Blunn

Manuel H Innocent

Victor Lenchenkov

Johan Camiel Julia Janssens

Dajiang Yang

Vladimir Korobov

Bartosz Piotr Banachowicz

Muhammad Maksudur Rahman

Ulrich C Boettiger

Swarnal Borthakur

Irfan Rahim

Richard A Mauritzson

Jeffery S Beck

John W Ladd

Jingyi Bai

Christopher D Silsby

Hong-Wei Lee

Robert M Gravelle

Cornelis Daniel Hoekstra

Jeffrey S Nelson

Roger W Eagans

Christopher Silsby

An image sensor may include an array of imaging pixels arranged in rows and columns. A method of operating an imaging pixel is provided that includes accumulating charge in a photosensitive element, allowing the accumulated charge in the photodiode to overflow into a capacitor that is coupled to a reset transistor having a gate terminal configured to receive a reset control signal during an integration phase, and extending the dynamic range of the imaging pixel by dynamically adjusting the reset control signal from a first voltage level to a second voltage level during the integration phase. The reset control signal can be lowered from the first voltage level to the second voltage level in a discrete or continuous fashion such that a portion of the overflow charge in the capacitor represents a linear signal and a portion of the overflow charge in the capacitor represents a non-linear signal.

Image sensors with extended dynamic range

An image sensor may include an array of imaging pixels arranged in rows and columns. Each imaging pixel may include a photodiode, an overflow capacitor, an overflow transistor that is interposed between the photodiode and the overflow capacitor, a floating diffusion region, a transfer transistor that is interposed between the photodiode and the floating diffusion region, a voltage supply, and a reset transistor that is interposed between the floating diffusion region and the voltage supply. The voltage supply may provide a voltage at a first magnitude that is less than the pinning voltage for a first portion of a reset period and may provide the voltage at a second magnitude that is greater than the pinning voltage for a second portion of the reset period.

Image sensors having high dynamic range pixels

An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.

Methods and circuitry for improving global shutter efficiency in backside illuminated high dynamic range image sensor pixels

Image sensors may include multiple vertically stacked photodiodes interconnected using vertical deep trench transfer gates. A first n-epitaxial layer may be formed on a residual substrate; a first p-epitaxial layer may be formed on the first n-epitaxial layer; a second n-epitaxial layer may be formed on the first p-epitaxial layer; a second p-epitaxial layer may be formed on the second n-epitaxial layer; and so on. The n-epitaxial layers may serve as accumulation regions for the different epitaxial photodiodes. A separate color filter array is not needed. The vertical transfer gates may be a deep trench that is filled with doped conductive material, lined with gate dielectric liner, and surrounded by a p-doped region. Image sensors formed in this way may be used to support a rolling shutter configuration or a global shutter configuration and can either be front-side illuminated or backside illuminated.

Image sensors with vertically stacked photodiodes and vertical transfer gates

An image sensor pixel may include multiple split photodiodes that are covered by a single microlens. The image sensor may include a charge overflow capacitor coupled to a pixel charge storage within the image sensor via a gain control transistor. The image sensor pixel may have phase detection capabilities in a first mode of operation enabled by comparing phase signals generated from the split photodiodes. The image sensor pixel also may generate and readout image signals simultaneously in both rolling shutter operations and global shutter operations in a second mode of operation. The image sensor pixel may also generate an image using a linear combination of at least two signals read out using the charge overflow capacitor and light flickering mitigation operations. The image may be a high dynamic range image that is generated from at least a low exposure signal and a high exposure signal.

Image sensor pixels with overflow capabilities

An imaging pixel may have a fully depleted charge transfer path between a pinned photodiode and a floating diffusion region. A pinned transfer diode may be coupled between the pinned photodiode and the floating diffusion region. The imaging pixel may be formed in upper and lower substrates with an interconnect layer coupling the upper substrate to the lower substrate. The imaging pixel may include one or more storage diodes coupled between the transfer diode and the floating diffusion region. The imaging pixel may be used to capture high dynamic range images with flicker mitigation, images synchronized with light sources, or for high frame rate operation.

Imaging pixels with a fully depleted charge transfer path

An image sensor pixel may include a photodiode, one or more storage diodes, one or more potential barrier structures, one or more capacitors, and a floating diffusion region. The photodiode may be coupled to a storage diode and a first capacitor, and a first potential barrier structure may be interposed between the storage diode and the first capacitor. The photodiode may also be coupled to additional storage diodes and additional capacitors in a similar manner. Additionally, the photodiode may be directly separated from a given capacitor via a corresponding potential barrier structure. Each capacitor may store overflow charge from one or more storage diodes and/or the photodiode and may be connected to the floating diffusion via respective transistors.

Image sensors having multi-storage image sensor pixels

An image sensor operable in global shutter mode may include an array of image pixels. Each image pixel may include a photodiode for detecting incoming light and a separate storage diode for temporarily storing charge. To maximize the efficiency of the image pixel array, image pixels may include light guide structures and light shield structures. The light guide structures may be used to funnel light away from the storage node and into the photodiode, while the light shield structures may be formed over storage nodes to block light from entering the storage nodes. The light guide structures may fill cone-shaped cavities in a dielectric layer, or the light guide structures may form sidewalls having a ring-shaped horizontal cross section. Metal interconnect structures in the dielectric layer may be arranged in concentric annular structures to form a near-field diffractive element that funnels light towards the appropriate photodiode.

Global shutter image sensors with light guide and light shield structures

An image sensor pixel may include a photodiode coupled to a pixel charge storage via a charge transfer transistor, a charge overflow capacitor coupled to the pixel charge storage via a gain control transistor, and an adjustable reset drain that is coupled to the charge overflow capacitor via a reset transistor. The reset transistor may receive a reset signal that is dynamically adjusted during an acquisition phase to help reduce flicker. The potential barrier of the reset transistor may also be calibrated during readout to reduce fixed pattern noise among different pixels. The image sensor pixel may generate an image using a linear combination of at least three signals read out using the charge overflow capacitor and light flickering mitigation operations. The image may be a high dynamic range image that is generated from at least a low exposure signal and a high exposure signal.

High dynamic range image sensors with flicker and fixed pattern noise mitigation

An imaging system may include an image sensor having a pixel array. The pixel array may receive test signals from multiplexers located at the top or bottom of each column of the array. Test signals may be provided to each column based on a predefined test pattern. In some arrangements, pixel array photodiodes may receive test signals through an anti-blooming transistor while the anti-blooming transistor is on. In other arrangements, dark current of photodiodes in the pixel array may be modulated by voltages applied to the drain of an anti-blooming transistor while the anti-blooming transistor is off. In other arrangements, pixel array photodiodes may receive test signals through a reset transistor. Arbitrary test patterns may be applied to determine photodiode or floating diffusion node leakage and incorrect pixel control voltages. Arbitrary patterns may also be superimposed on light-based image data in the manner of a watermark.

Methods and apparatus for generating test and overlay patterns in image sensors

An imaging pixel may be provided with an upper substrate layer, a lower substrate layer, a floating diffusion region in the upper substrate layer, and a photodiode in the upper substrate layer that is coupled to the floating diffusion region. The imaging pixel may also include a source follower transistor in the lower substrate layer and an interconnect layer in between the upper substrate layer and the lower substrate layer. The interconnect layer may couple the floating diffusion region directly to the source follower transistor. The imaging pixel may include a reset transistor in the upper substrate layer. The imaging pixel may include a metal layer in the lower substrate layer, a transfer transistor in the upper substrate layer, and an interconnect layer that couples the transfer transistor to the metal layer.

Growing community of inventors

Boise, ID, United States of America

Sergey Velichko