Nxp Usa, Inc.

Freescale Semiconductor,inc.

Continental Teves, Ag and Company Ohg

Sergey Sergeevich Ryabchenkov

Ivan Victorovich Kochkin

John M Pigott

Pierre Turpin

Robert Gach

Tobias Beckmann

Ireneusz Janiszewski

Claas Cornelius

Eugeny Alexandrovich Kulkov

A method for transmitting messages in a data bus system, wherein the messages can be transmitted in the form of data frames by a data bus and a data frame that is to be sent by a bus subscriber is checked for a piece of changeover information, which method is furthermore distinguished in that changeover of the rise time and/or edge shape of edges of bit pulses of the data frame that is to be sent is performed on the basis of the presence of a defined value of the piece of changeover information. In addition, a corresponding transceiver and to an electronic control unit is disclosed.

Method for transmitting messages in a data bus system, transceiver and electronic control unit for a motor vehicle

A voltage regulator comprises a ground node, a pick-off node, a regulator branch, a load branch, and a current mirror the regulator branch and the load branch are connected in parallel between the pick-off node and the ground node; the load branch comprises one or more resistive connecting lines that are connectable in series with the load to generate a load current through the load branch; the regulator branch comprises a bias node, a resistive element, and a tap node; the bias node is arranged to provide a regulated bias voltage; the resistive element is connected between the bias node and the pick-off node; and the tap node is connected between the bias node and the resistive element. The current mirror is connected to the tap node and arranged to draw a mirror current from the tap node; the mirror current having a component that is proportional to the load current.

Voltage regulator with improved load regulation

A current generator circuit includes at least one current generation component arranged to generate an output current of the current generator circuit, at least one absolute current calibration component arranged to enable calibration of an absolute current value of the output current, and at least one temperature coefficient calibration component arranged to enable calibration of a temperature coefficient characteristic of the output current. The at least one temperature coefficient calibration component is further arranged to be in a passive state at a reference temperature.

Current generator circuit and method of calibration thereof

A reference voltage source comprises a bandgap voltage reference circuit having a first node and an output node, the output node being arranged for providing a reference voltage. A curvature correction circuit has an input node connected to the output node and/or to a base of a first bipolar device of the bandgap voltage reference circuit and/or to a base of a second bipolar device of the bandgap voltage reference circuit. The curvature correction circuit has an output node connected to the first node of the bandgap voltage reference circuit. The curvature correction circuit comprises a current source for providing a current having a different temperature dependency than a temperature dependency of a first current through the first bipolar device of the bandgap voltage reference circuit.

Reference voltage source and method for providing a curvature-compensated reference voltage

A sample-and-hold circuit () is provided that that includes a sample-and-hold switch (), an integrator circuit () designed to generate an output voltage (V) signal, and a bias voltage (V) source (). The sample-and-hold switch () incldues a first switch (), a second switch (), and a third switch (). The first switch () has a first gate (), a first source () and a first drain (), the second switch () has a second gate (), a second source () electrically coupled to a bulk region (), and a second drain (), and the third switch () has a third gate (), a third drain (), and a third source () coupled to the first source (). The integrator circuit () includes an output operational amplifier () having an inverting input (V) () coupled to the second drain () and a non-inverting input (V). The bias voltage (V) source () applies a bias voltage (V) to the third drain and the non-inverting input (V) to drive a gate-to-source voltage (V) of the second switch () to an optimum negative value that reduces a sub-threshold leakage current (I) and a Gate Induced Drain Lowering (GIDL) leakage current in the second switch (), and to drive a drain-to-source voltage (V) of the second switch () is biased at a low value equal to an offset voltage (V) of the output operational amplifier () to minimize a drain-to-bulk current (I) in the second switch ().

Growing community of inventors

Zelenograd, Russia

Sergey Sergeevich Ryabchenkov