Hypres, Inc.

Seeqc Inc.

Sergey K Tolpygo

Daniel Yohannes

John Vivalda

Denis Amparo

Richard Hunt

Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.

System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits

An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.

Double-masking technique for increasing fabrication yield in superconducting electronics

A new technique is presented for improving the microfabrication yield of Josephson junctions in superconducting integrated circuits. This is based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so as to a) maximize adhesion between the resist and the underlying superconducting layer, b) be etch-compatible with the underlying superconducting layer, and c) be insoluble in the resist and anodization processing chemistries. In a preferred embodiment of the invention, the superconductor is niobium, the material on top of this is silicon dioxide, and the top layer is conventional photoresist or electron-beam resist. The use of this combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits due to increase in junction uniformity and reduction in defect density. An additional improvement over the prior art involves the replacement of a wet-etch step with a dry etch more compatible with microlithography.

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Putnam Valley, NY, United States of America

Sergey K Tolpygo