Intel Corporation

Other

Google Inc.

Serge Rutman

Louis A Lippincott

Kenneth Edward Salsman

Samson X Huang

Michael Francis O'Connor

Garth Conboy

Robert L Hare

Genisim Tsilker

A system for and method of reinitializing a screen controller of an electronic display device, such as an electrophoretic display, are disclosed. The system may comprise at least one computer processor associated with a screen controller of an electrophoretic display device, where the at least one computer processor may be configured to initialize screen controller registers, loading a waveform into the screen controller of the electrophoretic display device, copying previously stored screen image data stored in direct memory access to current storage of the screen controller; and executing an update process to efficiently reinitialize the screen controller of the electrophoretic display after panel power to the electrophoretic display is provided by at least one power source of the electrophoretic display.

System and method for reinitializing a screen controller of an electronic display device

Techniques for providing localized power infrastructure and data infrastructure are disclosed. A transportable system for providing localized power infrastructure and data infrastructure can include: a data network service engine configured to function as a local data network service provider; a power generation engine configured to function as a local power service provider that generates and distributes power locally; a deployment engine configured to assist in deploying one or more components of the transportable system; and a maintenance engine configured to maintain operation and security of the transportable system. In some embodiments, multiple transportable systems can be deployed and then centrally monitored or controlled as a single, utility system and/or a single data delivery infrastructure.

System and method for self-powered communications networks

A projection engine having a first kernel for modulating light of a first polarization, and a second kernel for modulating light of a second polarization, and a polarization combiner for merging light from the kernels into a dual polarization modulated output beam.

Projection engine

An apparatus for processing visual data includes a first video random access memory (VRAM) for storing a first bit plane of visual data in a first format. A graphics controller is coupled to the first VRAM by a data bus and a storage bus. The apparatus is capable of receiving at least a second VRAM for storing at least a second bit plane of visual data in at least a second format different from the first format. The received VRAMs are coupled to the graphics controller by data and storage busses. The visual data stored on the VRAMs are merged into a pixel stream which is then converted to analog form by a digital to analog converter. Data transfer addresses are generated for each of the VRAMs simultaneously, sequentially or in overlapping timed relationship.

Visual frame buffer architecture

A special type of random access memory referred to as video random access memory (VRAM) is used through to provide multiple access to the memory in a timely manner. The VRAM is characterized by a random access port which enables random accessing to the memory array and a serial port comprising a shift register for outputting a large group of bits of data, such as pixels representative of a scan line of a video image, which are rapidly output by the memory. In the present invention, the VRAM is utilized in a different manner to provide more efficient use of memory without degradation in system performance. The VRAM provides for communications between processors as well as the memory utilized by the coprocessor for storage of code and data. Communications between processors is performed through the serial port; therefore, data is communicated via blocks of data transfers minimizing the frequency of access to the memory array. The co-processor, which utilizes the memory for processing and code storage, communicates with the memory through the random access port in order for the co-processor to perform its functions in a timely manner. The co-processor will only be interrupted in its access of the memory when it is determined that blocks of data are to be transferred into the or out of the memory via the serial port.

Growing community of inventors

Boulder Creek, CA, United States of America

Serge Rutman