U.S. Philips Corporation

Serge Robert

Pierre Le Marchant

Olivier F Cahart

Pierre Fevrier

The data processing system according to the invention has a microprocessor and an external erasable and programmable memory. A logic connection system is arranged between control pins of the microprocessor and a controlled pin of the external memory. These control pins of the microprocessor are the program control pin, a port control pin, the controlled pin of the memory and the memory selection pin. This ligic connection system permits using only one memory both for reading and writing of instructions and/or data instead of the two memories generally used.

Data processing system which permits of using the same erasable and

A network having a series architecture and comprising an electronic master device (M) and a plurality of electronic slave devices (E.sub.1, E.sub.2, . . . ). Each electronic slave device is provided with an associated connection device (30) which enables the electronic slave device to be connected to a common communication channel (2) which interconnects the electronic slave devices and the master device. The common communication channel passes through the connection devices in order to preclude the occurrence of conflicting voltages when one of the electronic slave devices attempts to carry out a transmission to the electronic master device. For this purpose each connection device is equipped with a dedicated-line receiver and a dedicated-line transmitter in cascade, and an open-collector driver connecting the transmission part of the corresponding slave device to the input of the transmitter.

Communication network having a master-slave type series architecture and

A reciprocal authentication system between two groups of electronic units which can be interconnected for the exchange of data. The system periodically supplies a variable access key for the encrypting of confidential exchanges.

Growing community of inventors

Jouy en Josas, France

Serge Robert