Future Wei Technologies, Inc.

Alcatel

Alcatel USA Sourcing, L.p.

Huawei Technologies Co., Limited

Serge Francois Fourcand

Robert S Gammenthaler, Jr

Gary D Hanson

Eddie Ray Bradley

Ignacio A Linares

Dwight W Doss

David W Wynn

Michael J Hanlon

Gerry R Dubois

Val Teodorescu

Gerald R Dubois

Curt McKinley

A network component comprising a processor configured to implement a method comprising promoting the communication of a frame of octet-sized timeslots, wherein the timeslots are configured to carry a plurality of data types. Also disclosed is a method comprising communicating a high priority data and a low priority data in a frame comprising a plurality of octet-sized timeslots, wherein each timeslot is assigned to the high priority data or the low priority data, wherein the high priority data is provided in the timeslots assigned to the high priority data, and wherein the low priority data is provided in the timeslots assigned to the low priority data. Also disclosed is a network component comprising a processor configured to implement a method comprising recognizing the reception of a plurality of data streams each having a priority, and promoting the multiplexing of the data streams based on the priority of each data stream.

System for TDM data transport over Ethernet interfaces

A network component comprising at least one processor configured to implement a method comprising initiating a synchronization window, and promoting the transmission of a frame comprising a control symbol, wherein the control symbol delineates a beginning of the frame, and wherein the control symbol is offset from the beginning of the synchronization window. Also disclosed is a system comprising an upstream node in communication with a downstream node, wherein the upstream node transmits a data stream comprising a plurality of frames to the downstream node, wherein the data stream is organized into a plurality of synchronization windows, and wherein the frames float within the synchronization windows. Included is a method comprising transmitting an Ethernet data stream comprising an Ethernet control symbol, wherein the Ethernet control symbol is transmitted within a synchronization window and delineates a start of a packet within the synchronization window.

Network clock synchronization floating window and window delineation

A network component comprising a processor configured to receive a data stream from an upstream node, wherein the data stream comprises a plurality of Ethernet packets and a synchronization request comprising a timestamp, synchronize a clock with the timestamp, and transmit a response to the upstream node, wherein the data stream has the same bandwidth as a second data stream that does not have the synchronization request and the timestamp.

Inter-packet gap network clock synchronization

A network component comprising a processor configured to implement a method comprising promoting the communication of a frame within a synchronization window, wherein the frame comprises a plurality of data types carried in a plurality of timeslots, and wherein each timeslot is assigned to carry one of the data types, identifying an idle timeslot that is assigned to carry a first data type, and inserting a second data type into the idle timeslot. Also disclosed is a method comprising receiving a data stream comprising a plurality of timeslots, wherein each timeslot is assigned to carry one of a plurality of data types, and determining whether one of the timeslots assigned to carry a first data type contains a second data type.

Bandwidth reuse in multiplexed data stream

An apparatus comprising a timestamp support logic component configured to identify a plurality of timestamps for a plurality of network nodes on a single link and align the timestamps in a plurality of corresponding time slots for the network nodes within a periodic transmission time window and a scheduler coupled to the timestamp support logic component and configured to align a plurality of packets that do not comprise timestamps in a corresponding time slot subsequent to the time slots for the timestamps in the periodic transmission time window.

Deterministic placement of timestamp packets using a periodic gap

An apparatus comprising an ingress controller configured to receive a data frame comprising a high priority data and a low priority data, and an ingress buffer coupled to the ingress controller and configured to buffer the low priority data, wherein the high priority data is not buffered. Also disclosed is a network component, comprising an ingress controller configured to receive a data stream comprising high priority data and low priority data, and an ingress buffer coupled to the ingress controller and configured to receive, buffer, and send the low priority data, and further configured to receive a flow control indication, wherein the ingress buffer varies an amount of the low priority data sent from the ingress buffer in accordance with the flow control indication.

Multiplexed data stream circuit architecture

A network component comprising a processor configured to implement a method comprising promoting transmission of a first frame comprising a first timestamp associated with a transmission time of the first frame, recognizing a reception of a second frame having a reception time, wherein the second frame comprises a second timestamp comprising a downstream node delay associated with a downstream node, measuring a total delay between the transmission time of the first frame and the reception time of the second frame, and calculating a transport delay using the total delay and the downstream node delay. Also disclosed is a clock synchronization method comprising receiving a first frame comprising a first timestamp associated with an upstream clock at a reception time, sending a second frame at a transmission time, and measuring a downstream node delay between the reception time and the transmission time, wherein the second frame comprises the downstream node delay.

Multi-frame network clock synchronization

A network comprising a destination node, and a plurality of source nodes configured to transmit high-priority data and low-priority data to the destination node, wherein the source nodes correlate the transmission of the high-priority data to the destination node such that the high-priority data from each source node does not substantially contend with the high-priority data from the other source nodes upon arrival at the destination node. Also disclosed is a network component comprising at least one processor configured to implement a method comprising creating a periodic time window, partitioning the time window into low-priority time-bands and high-priority time-bands, placing a plurality of high-priority packets in the high priority time-bands, and placing a plurality of low-priority packets in the low-priority time-bands.

Closed-loop clock synchronization

A backbone network, comprising a network switch configured to communicate data over Ethernet and SONET/SDH interfaces without encapsulating the data. Also disclosed is a backbone network, comprising a plurality of synchronized network switches, wherein the switches are configured to communicate a plurality of time division multiplexed data streams across at least part of the network via a plurality of Ethernet interfaces and a plurality of SONET/SDH interfaces, and wherein the switches are configured to communicate the data streams without encapsulating the data streams.

Multi-network compatible data architecture

A network component comprising a source-delay locked loop (S-DLL), a source timestamp queue (S-Q) coupled to the S-DLL, and a switch fabric coupled to the S-Q such that the S-Q is positioned between the switch fabric and the S-DLL, and wherein the S-DLL is configured to couple to an absolute timing component. Disclosed is a method comprising queuing a plurality of timestamps at a plurality of timestamp intervals from a source node, returning the received timestamps to the source node at the same timestamp intervals, receiving a plurality of offsets corresponding to the timestamps that are calculated using a virtual delay time for the timestamps from the source node, and aligning the queued timestamps to match the virtual delay time before processing additional timestamps to synchronize transmissions and establish frequency alignment with the source node.

Network timing distribution and synchronization using virtual network delays

A network component comprising a forwarding physical layer (PHY) unit comprising a source queue (SQ), wherein the forwarding PHY unit is configured to measure a one-way physical layer delay between the forwarding PHY unit and a destination node. Also disclosed is a network component comprising a forwarding PHY unit configured to send a plurality of symbols at a network physical layer to a destination node and receive the symbols at a network physical layer from the destination node, and a SQ configured to queue the symbols returned from the destination node, wherein the forwarding PHY unit is further configured to process the queued symbols to calculate a half round-trip delay based on a virtual delay time.

Layer one path delay compensation

A network component comprising at least one processor configured to promote transmission of a frame from a first node to a second node, the frame comprising a first clock synchronization data, and a first frame count, wherein the first clock synchronization data and the first frame count are used to synchronize a first clock in the first node and a second clock in the second node. Also disclosed is a method comprising processing a frame comprising an Ethernet control symbol that delineates the beginning of the frame, a first clock synchronization data, a first frame count, and a second clock synchronization data. Included is an Ethernet node comprising at least one processor configured to synchronize a clock using a clock synchronization data comprising a first timestamp, a first frame count, a second timestamp, and a second frame count.

Network clock synchronization timestamp

A network component comprising a first adaptation component, a second adaptation component, a system Phase-Locked-Loop (PLL) coupled to the first adaptation component, a comparison and voting logic component coupled to the first adaptation component and the system PLL component, a compensation logic component coupled to the comparison and voting logic component, and a positive/negative delay component coupled to the second adaptation component and the compensation logic component. Also disclosed is a network component comprising a comparison and voting logic function block configured to compare a plurality of internal timing references in a system PLL synchronization area, a compensation logic function block configured to calculate an offset value if any of the internal references substantially deviates from an expected value in a deterministic outcome, and a delay function block configured to add the calculated offset value to a timing reference that is forwarded to a subsequent node.

Method and apparatus to reduce wander for network timing reference distribution

An apparatus comprising a switch fabric coupled to a plurality of interfaces and configured to switch a plurality of universal service transport (UST) multiplexing (USTM) data streams between the interfaces, wherein the USTM data streams comprise packet-switched traffic, circuit-switched traffic, and transitional signaling that indicates a change of state between the packet-switched traffic and the circuit-switched traffic, wherein the transitional signaling does not indicate the state in every octet of the USTM data streams. Also disclosed is a network component comprising at least one processor coupled to a memory and configured to receive a data that corresponds to a flow, identify the flow using a flow map, determine whether there is a change in a state of the flow, send transitional signaling on a USTM data stream that indicates the state of the flow if the state of flow has changed, and send the data on the USTM data stream.

Growing community of inventors

Fairview, TX, United States of America

Serge Francois Fourcand