Skhynix Inc.

Korea University Industry Cooperation Foundation

Osong Medical Innovation Foundation, Korea University Research and Business Foundation

Seonwook Kim

Wonjun Lee

Jaeyung Jun

Yoonah Paik

Changhyun Kim

A semiconductor device includes a memory cell array, an address input circuit, a command input circuit, a data Input/Output (IO) circuit, a processing control circuit, a processing circuit, and a switch circuit. The processing control circuit includes a register array storing an address of an operand and determines whether an address provided from the address input circuit corresponds to the address stored in the register array. The processing circuit is configured to provide a processing result by performing an operation on data provided from the memory cell array. The switch circuit is configured to control a data path among the processing circuit, the data IO circuit, and the memory cell array and controls the data path to connect the memory cell array to the processing circuit when the address provided from the address input circuit corresponds to the address stored in the register array.

Semiconductor device capable of performing in-memory processing

A computing system using a bit counter may include a host device; a cache configured to temporarily store data of the host device, and including a plurality of sets; a cache controller configured to receive a multi-bit cache address from the host device, perform computation on the cache address using a plurality of bit counters, and determine a hash function of the cache; a semiconductor device; and a memory controller configured to receive the cache address from the cache controller, and map the cache address to a semiconductor device address.

Computing system and method using bit counter

A memory controller uses a history of the rows accessed by commands from a command queue in a command queue circuit to predict whether a second access performed immediately after the command queue becomes empty will be to a same row as a first access performed immediately before the command queue became empty. When the second access is predicted to be to a different row, the row corresponding to the first access is closed in response to the command queue becoming empty. When the second access is predicted to be to the same row, the row corresponding to the first access is not closed in response to the command queue becoming empty.

Growing community of inventors

Icheon, South Korea

Seonwook Kim