Samsung Electronics Co., Ltd.

Seonhaeng Lee

Sangwoo Pae

Namhyun Lee

Jisook Hong

Gangjun Kim

Iloh Jang

A semiconductor device includes a first fin pattern protruding from a substrate and extending in a first direction; first and second active layers extending in the first direction on the first fin pattern, the second active layer being at a level higher than a level of the first active layer, the first and second active layers forming a first active layer structure; a first gate intersecting the first and second active layers, surrounding upper and lower surfaces and opposing side surfaces of each of the first and second active layers, and extending in a second direction; and a second gate intersecting the first and second active layers, surrounding upper and lower surfaces and opposing side surfaces of each of the first and second active layers, extending in the second direction, and disposed to be parallel to the first gate. The first active layer includes a first region extending from a first overlapping region of the first active layer overlapping the first gate by a first length in a direction away from the second gate, and the second active layer includes a first region extending from a first overlapping region of the second active layer overlapping the first gate by a second length in a direction away from the second gate, the second length shorter than the first length.

Semiconductor device having different extending active layers

A transistor includes: a gate structure disposed on a substrate, and including a gate insulation layer and a gate electrode; a first impurity region disposed at an upper portion of a substrate and adjacent to a first sidewall of the gate structure; a second impurity region disposed at an upper portion of the substrate and adjacent to a second sidewall opposite to the first sidewall of the gate structure; and a first threshold voltage controlling line spaced apart from the substrate, wherein the first threshold voltage controlling line faces at least a portion of the first impurity region, wherein the first threshold voltage controlling line includes a conductive material, and wherein the first threshold voltage controlling line extends in a direction that crosses a direction in which the first impurity region extends.

Transistor capable of electrically controlling a threshold voltage and semiconductor device including the transistor

The present disclosure refers to memory devices and manufacturing methods thereof. In an embodiment, a memory device includes a memory cell array, a first dummy capacitor, a second dummy capacitor, and a third dummy capacitor. The memory cell array includes gate structures formed on a substrate, first active regions adjacent to the gate structures, gate insulating layers disposed between the gate structures and the first active regions, and cell capacitors connected to the first active regions. The first and second dummy capacitors extend in a first direction and in the vertical direction, and are disposed to be adjacent to the memory cell array in a second direction. The third dummy capacitor extends in the second direction and the vertical direction and is disposed to be adjacent to the memory cell array in the first direction. The memory cell array is disposed between the first and second dummy capacitors.

Growing community of inventors

Suwon-si, South Korea

Seonhaeng Lee