Samsung Electronics Co., Ltd.

Seongyoung Ryu

Sunkwon Kim

Uijong Song

Heejin Lee

Yilho Lee

Minsung Kim

Taejin Kim

Yongil Kwon

Hyunwoo Cho

Sengsub Chun

Soojoo Lee

Jongil Hwang

Hyungjoong Kim

A display driving circuit includes a control logic, a source amplifier, and first and second switching elements. The source amplifier includes a first input terminal, a second input terminal, and an output terminal, and amplifies a pixel voltage for displaying an image on a display panel and provides the amplified pixel voltage to a pixel through a data line. The first switching element is connected between the first input terminal and the output terminal, and the second switching element is connected between the first input terminal and the sensing line. The control logic controls the first switching element and the second switching element such that the source amplifier compares a sample voltage that is input to the first input terminal through a sensing line with a comparison voltage input to the second input terminal and outputs comparison data based on the comparison.

Display driving circuit and display device including the same

A display device includes pixels arranged in rows and columns, a scan driver, and a read-out circuit, wherein the read-out circuit is configured to read-out electrical properties of a pixel through the read-out line. The first pixel includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a first organic light-emitting diode connected between a second electrode of the seventh transistor and a ground node to which a ground voltage is applied, a second organic light-emitting diode between the second electrode of the eighth transistor and the ground node, and a third organic light-emitting diode connected between the second electrode of the ninth transistor and the ground node.

Display device

A display device includes a plurality of pixels, a scan driver, a data driver, and a read-out circuit configured to read out electrical characteristics of the plurality of pixels. A first pixel of the plurality of pixels includes a first transistor connected to a first node and having a gate connected to a second node, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor including a first terminal connected to a seventh conductive line, a second terminal connected to the second node, and having a gate connected to a fourth conductive line, a seventh transistor including a first terminal connected to the seventh conductive line, a second terminal connected to a third node, and a gate connected to a fifth conductive line, a capacitor, and an organic light emitting diode.

Display panel and display device

A receiver circuit includes data lane modules, a clock lane module, a bias current controller and a link layer. Each of the data lane modules receive respective data signals. The clock lane module receives clock signals and provides each of the data lane modules with a respective divided clock signal among divided clock signals. The bias current controller controls a clock bias current. The link layer provides a bias control signal to the bias current controller and provides clock gating signals to the clock lane module, based on low power data signals and low power clock signals. The bias current controller, based on the bias control signal, provides the clock bias current having a first magnitude to the clock lane module in a second power mode and provides the clock bias current having a second magnitude to the clock lane module in a third power mode.

Receiver circuits

A display apparatus includes plural pixels, a scan driver, a data driver, and a read-out circuit that reads out an electrical characteristic of each of the pixels. Each of the pixels includes a first transistor, a second transistor, a third transistor, a fourth transistor including a first electrode connected with a power node, a second electrode connected with a first node, and a gate connected with a first emission control line, a fifth transistor including a first electrode connected with a third node, a second electrode, and a gate connected with a second emission control line, a sixth transistor including a first electrode connected with a read-out line, a second electrode connected with the third node, and a gate connected a the read-out/initialization control line, a capacitor connected between the first node and the second node, and an organic light-emitting diode.

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Suwon-si, South Korea

Seongyoung Ryu