Samsung Electronics Co., Ltd.

Seoul National University

Korea Institute of Science and Technology

Seongsik Park

Hyeokjun Choe

Sungroh Yoon

Seijoon Kim

Jaewook Kim

Jong-Keuk Park

InHo Kim

Suyoun Lee

Joon Young Kwak

Jongkil Park

Yeonjoo Jeong

Kyu Sik Mun

The present disclosure relates to a nonlinearity compensation circuit for a memristive device. The circuit according to an embodiment includes at least one power source unit to apply an input pulse; a modulation unit connected to the at least one power source unit to adjust a pulse width of an update pulse to be applied to the memristive device; and the memristive device to which the modulated update pulse is applied.

Nonlinearity compensation circuit for memristive device

A method of operating a storage device including a neural network processor includes outputting, by a controller device, a trigger signal instructing the neural network processor to perform a neural network operation in response to a command from a host device, requesting, by a neural network processor, target model data about parameters of a target model and instruction data for instructing the neural network operation to a memory device storing the target model data and the instruction data in response to the trigger signal, receiving, by the neural network processor, the target model data and the instruction data from the memory device and outputting, by the neural network processor, inference data based on the target model data and the instruction data.

Storage device and method of operating the same

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Seoul, South Korea

Seongsik Park