Samsung Electronics Co., Ltd.

Seongkeun Cho

Kun Tack Lee

Eunhee Jeang

Jihun Lee

Hyunjae Kang

Seung Min Shin

Taemin Earmme

Hun Jae Jang

Tae Min Earmme

Eun Hee Jeang

Young Hoo Kim

Gyumin Jeong

Tae Hyun Kim

Youngseok Kim

Hee Young Park

Daeyoung Moon

Yihwan Kim

Sung-Wook Jung

Sangwoo Bae

Akinori Okubo

Incheol Song

Jin Hyung Park

Young Sin Kim

Keum Joo Lee

Kyungrim Kim

Sangchul Han

Janghwi Lee

Jung Hyuk Jang

Sungduk Hong

Suhwan Hwang

Chun Hyung Chung

Jangwon Cho

Youngbok Lee

Jae Seong Park

A substrate processing apparatus includes a chamber providing a space where a semiconductor process is performed on a semiconductor substrate, a substrate plate configured to support the semiconductor substrate, the substrate plate having a central region and a peripheral region surrounding the central region, a central embossing pattern on the central region and configured to support a central portion of the semiconductor substrate, a plurality of first embossing patterns radially arranged around the central embossing pattern on the peripheral region, each of the plurality of first embossing patterns extending radially outward from the central embossing pattern with a first length, and a plurality of second embossing patterns respectively provided between the first embossing patterns on the peripheral region, each of the plurality of second embossing patterns extending radially outward from the central embossing pattern with a second length that is less than the first length.

Substrate processing apparatus

There is provided a semiconductor memory device capable of improving the performance and/or the reliability of a device. The semiconductor memory device includes a substrate having a cell area and a peripheral area defined along a periphery of the cell area, wherein the cell area includes an active area defined by a cell element separation film, a cell area separation film in the substrate and defining the cell area, and a plurality of storage contacts connected to the active area, and arranged along a first direction. The plurality of storage contacts includes a first storage contact, a second storage contact, and a third storage contact, wherein the second storage contact is between the first storage contact and the third storage contact, each of the first storage contact and the third storage contact contains or surrounds or defines an airgap, and the second storage contact is free of an airgap.

Semiconductor memory device and method for manufacturing the same

A semiconductor memory device includes a substrate including a cell area and a peripheral area defined by a periphery of the cell area, the cell area including a dummy cell area and a normal cell area, and an active area defined by a cell element isolation film. The device includes a cell area separation film defining the cell area in the substrate, the dummy cell area defining a boundary with the cell area separation film between the normal cell area and the cell area separation film. The device includes a normal bit-line on the normal cell area and extending in a first direction, a dummy bit-line group on the dummy cell area, the dummy bit-line group including a plurality of dummy bit-lines extending in the first direction, and a plurality of storage contacts connected to the active area and located along a second direction perpendicular to the first direction.

A method of fabricating a semiconductor device is disclosed. The method may include forming a parent pattern, forming an upper thin film on the parent pattern, forming a child pattern on the upper thin film, measuring a diffraction light from the parent and child patterns to obtain an intensity difference curve of the diffraction light versus its wavelength, and performing an overlay measurement process on the parent and child patterns using the diffraction light, which has the same wavelength as a peak of the intensity difference curve located near a peak of reflectance of the parent and child patterns, to obtain an overlay measurement value.

Method of fabricating a semiconductor device

A wafer processing apparatus includes a chamber body including a cavity region and a process region; a microwave waveguide configured to introduce a microwave into the cavity region; a first microwave window between the cavity region and the process region; and a magnetic field supplying device configured to apply a magnetic field inside the chamber body, wherein a thickness of the first microwave window is constant, and the first microwave window is configured to control a beam cross-section of the microwave in the process region.

Wafer processing apparatus

A wafer cleaning apparatus, a method of cleaning wafer and a method of fabricating a semiconductor device are provided. The method of fabricating the semiconductor device includes disposing a wafer on a rotatable chuck, irradiating a lower surface of the wafer with a laser to heat the wafer, and supplying a chemical to an upper surface of the wafer to clean the wafer, wherein the laser penetrates an optical system including an aspheric lens array, the laser penetrates a calibration window, which includes a first window structure including a first light projection window including first and second regions different from each other, a first coating layer covering the first region of the first light projection window, and a second coating layer covering the second region of the first light projection window, and the first coating layer and the second coating layer have different light transmissivities from each other.

Wafer cleaning apparatus, method for cleaning wafer and method for fabricating semiconductor device

An optical test system includes a stage region to accommodate an object to be tested, a first incident optical system which changes a first polarization state of a first light beam to a second polarization state and provide the first light beam in the second polarization state to the stage region in a first direction at a first incident angle which is not a right angle, a second incident optical system which changes a third polarization state of a second light beam to a fourth polarization state and inputs the second light beam in the fourth polarization state to the stage region in a second direction at a second incident angle which is not a right angle, and a main optical system to detect a first reflected light beam reflected from the stage region at a first reflection angle different from the first and second incident.

Optical test system and method, and method of manufacturing semiconductor device by using the optical test system and method

Growing community of inventors

Suwon-si, South Korea

Seongkeun Cho