Samsung Electronics Co., Ltd.

Seongjun Seo

Seok-Won Lee

Joyoung Park

Seokcheon Baek

Miram Kwon

Younghwan Son

Heung Jin Joo

Wookhyoung Lee

Hyun-Seok Na

Kang-Sup Roh

Heejueng Lee

Youngmo Ku

Yongin Cho

A semiconductor device includes a substrate having cell and connection regions, and a stack structure having dielectric layers and electrodes that are vertically and alternately stacked on the substrate. The stack structure includes a first pad part, a first fence part, a second pad part, and a second fence part that are sequentially arranged along a first direction. Each of the first and second pad parts has a first stepwise structure formed along the first direction and a second stepwise structure formed along a second direction that intersects the first direction, and each of the first and second fence parts includes dummy electrodes at the same levels as the electrodes and spaced apart from the electrodes. Sidewalls of the electrodes that define second stepwise structure of the second part are offset from sidewalls of the dummy electrodes that define second dummy stepwise structure of the first pad part.

Semiconductor device, electronic system including the same, and method of fabricating the same

A semiconductor device includes a first substrate, circuit elements, lower interconnection lines, a second substrate, gate electrodes stacked on the second substrate to be spaced apart from each other in a first direction and forming first and second stack structures, channel structures penetrating through the gate electrodes, and first and second contact plugs penetrating through the first and second stack structures, respectively, and connected to the gate electrodes. The first stack structure has first pad areas in which the gate electrodes extend further than upper gate electrodes, respectively, and are connected to the first contact plugs, respectively. The second stack structure has second pad areas in which the gate electrodes extend further than upper gate electrodes, respectively, and are connected to the second contact plugs, respectively. The first and second pad areas are offset in relation to each other so as not to overlap each other in the first direction.

Semiconductor devices and data storage systems including the same

Disclosed is a semiconductor device comprising a substrate including a cell array region and a connection region, an electrode structure extending in a first direction on the substrate and including vertically stacked electrodes having pad sections arranged stepwise on the connection region, a first contact plug connected to a first one of the pad sections, a pair of first vertical structures that penetrate the first one of the pad sections and are spaced apart from each other in a first direction by a first distance, a second contact plug connected to a second one of the pad section and having a vertical length that is greater than that of the first contact plug, and a pair of second vertical structures that penetrate the second one of the pad sections and are spaced apart from each other in the first direction by a second distance that is greater than the first distance.

Semiconductor device and electronic system including the same

A three-dimensional semiconductor memory device may include a substrate including a cell array region, a peripheral circuit region, and a connection region between the cell array region and the peripheral circuit region. The memory device may include an electrode structure extending from the cell array region toward the connection region and comprising electrodes stacked on the substrate, a horizontal gate dielectric layer between the electrode structure and the substrate and including a first portion on the cell array region and a second portion on the connection region, the second portion thicker than the first portion in the vertical direction, first vertical channels on the cell array region and penetrating the electrode structure and the first portion of the horizontal gate dielectric layer, and second vertical channels on the connection region and penetrating the electrode structure and the second portion of the horizontal gate dielectric layer.

Three-dimensional semiconductor memory devices

A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.

Growing community of inventors

Hwaseong-si, South Korea

Seongjun Seo