Samsung Electronics Co., Ltd.

Seong Hyeog Choi

Hong Rak Son

Jun Jin Kong

Yong June Kim

Jung Soo Chung

Jae Hong Kim

Kyoung Lae Cho

Eun Chu Oh

Sang Hoon Lee

Hongrak Son

Dong-Min Shin

Pilsang Yoon

Ki Jun Lee

Sang Yong Yoon

Min Uk Kim

Hee Seok Eun

Tae Hyun Song

Young June Kim

Jong Ha Kim

Young Suk Ra

An operating method of a memory controller is provided. The operating method includes receiving a first read data and a second conversion information, the second conversion information including data obtained by converting a second read data based on a linear operation, and the first read data and the second read data including data read from same memory cells; converting the first read data based on the linear operation to generate a first conversion information; performing a logical operation on the first conversion information and the second conversion information to generate an operation information; performing an inverse operation of the linear operation on the operation information to generate a reliability information; and correcting an error of the first read data based on the first read data and the reliability information.

Operating method of memory controller, storage device and the operating method thereof

A method of operating a memory system including memory blocks, each including memory cells and divided into at least first and second sub-blocks. The method includes performing a program operation on memory cells connected to at least one word line of the first and second sub-blocks using a first program method of programming data having a first number of bits, performing an erase operation on the first sub-block, and detecting a state of distribution of threshold voltages of memory cells of the first and second sub-blocks, and determining whether a program operation is to be performed on memory cells connected to a second adjacent word line including at least one word line adjacent to the first sub-block, out of the memory cells of the second sub-block, by using a second program method of programming data having a second number of bits, based on the detecting.

Methods of operating memory systems for sub-block erase operation

A method of operating a data storage device includes generating at least one pseudo noise (PN) sequence using logical information and physical information for the data storage device. The method also includes converting first data into second data using the at least one PN sequence. The logical information may be a logical address for the data storage device, and the physical information may be a physical address for the data storage device.

Device and method for processing data using logical information and physical information

An apparatus and a method for reading from a non-volatile memory whereby soft decision data is used to determine the reliability of hard decision data. The hard decision data read from the non-volatile memory is de-randomized and the soft decision data read from the non-volatile memory is not de-randomized. Using the soft decision data, the hard decision data is decoded.

Method of reliably reading data stored in multi-level cell (MLC) non-volatile memory

A memory system including a non-volatile memory device and a memory controller is provided. When a read operation on a first data initially output from the non-volatile memory device during a first read operation is successful, the memory controller may change a read voltage for reading a second data stored in the non-volatile memory device during a second read operation.

Method for changing read parameter for improving read performance and apparatuses using the same

A method of programming multi-level cells included in a spare region, the method including programming first page data and at least one first dummy data in a first multi-level cell; and programming second page data and at least one second dummy data in a second multi-level cell.

Method for programming non-volatile memory device and apparatuses performing the method

According to example embodiments, a method of controlling a memory controller includes executing an error correction code (ECC) on first page data that has been read from a non-volatile memory device using a first read voltage level, estimating a second read voltage level for reading the first page data using metadata of second page data when an uncorrectable error is detected in the first page data according to a result of executing the ECC.

Method of operating memory controller and memory system including the memory controller

A method of estimating a read level for a memory device includes calculating first information corresponding to at least one among information about the number of cells having a particular logic level in data to be programmed and information about the number of cells having a particular cell state and storing the first information during a program operation; reading the data based on a threshold level that has been set and calculating second information about the number of cells in at least one state defined by the threshold level with respect to the read data; calculating third information about the number of cells in the at least one state, which corresponds to the second information, using a probability based on the first information; comparing the second information with the third information; and determining whether to change the threshold level according to the comparison result.

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Hwaseong-si, South Korea

Seong Hyeog Choi