Hynix Semiconductor Inc.

Seong Hwan Myung

Whee Won Cho

Cheol Mo Jeong

Jung Geun Kim

Eun Soo Kim

Seung Hee Hong

Suk Joong Kim

Eun Jung Ko

A method of forming a semiconductor memory device includes forming a tunnel insulating layer on a semiconductor substrate, and forming a silicon layer, including metal material, on the tunnel insulating layer. Accordingly, an increase in the strain energy of the conductive layer may be prohibited and, therefore, the growth of grains constituting the conductive layer may be prevented. Furthermore, a threshold voltage distribution characteristic and electrical properties of a semiconductor memory device may be improved.

Method of forming a semiconductor memory device

A method for fabricating a semiconductor device, in which a lifting phenomenon can be prevented from occurring in forming an amorphous carbon film on an etched layer having tensile stress. According to the invention, since a compression stress on the etched layer or the amorphous carbon film can be reduced or a compression stress film is formed between the etched layer or the amorphous carbon film to prevent a lifting phenomenon from occurring and thus another pattern can be formed to fabricate a highly integrated semiconductor device.

Method for fabricating semiconductor device

An active structure of a semiconductor device. In one aspect, the active structure of the semiconductor device includes first to (n)field regions, and first to (n+1)active regions formed alternately with the first to (n)field regions, wherein one or more of the first to (n+1)active regions are connected at edge portions thereof to close one or more of the field regions. In another aspect, the active structure of the semiconductor device includes first to (n)field regions, and first to (n+1)active regions formed alternately with the first to (n)field regions, wherein the first and (n+1)active regions are connected to (n+2)and (n+3)active regions at edge portions thereof, closing the field regions.

Active structure of a semiconductor device

A method of manufacturing a flash memory device includes the steps of forming gate patterns for cells and gate patterns for select transistors over a semiconductor substrate, forming a buffer insulating layer on the resulting surface including the gate patterns, forming an insulating layer to form void in spaces between the gate patterns for cells, forming a nitride layer on the insulating layer, and forming a spacer on one side of each of the gate patterns for select transistors by a spacer etch process.

Method of manufacturing flash memory device with void between gate patterns

A method of manufacturing flash memory devices increases a coupling ratio by increasing the height of a floating gate externally projecting from an isolation layer. A portion of the isolation layer between the floating gates is etched so that a control gate to be formed subsequently is located between the floating gates. Accordingly, an interference phenomenon can be reduced.

Method of manufacturing flash memory device

A method of forming a gate of a flash memory device, including the steps of forming a gate on a semiconductor substrate and forming an oxide layer on the entire surface of the gate, forming a nitride layer on a sidewall of the oxide layer in a spacer form, performing a polishing process so that a top surface of the gate is exposed, and then stripping the nitride layer to form an opening, forming a barrier metal layer on a sidewall of the opening, and forming a tungsten layer in the opening.

Method of forming gate of flash memory device

A semiconductor device includes a first barrier metal layer and a second barrier metal layer, a third barrier metal layer, and a metal line. The first barrier metal layer and the second barrier metal layer are formed and on a top surface of an insulating layer over a semiconductor substrate on the bottom surface of trenches formed in the insulating layer. The third barrier metal layer is formed on sidewalls of trenches. The metal line gap-fills the trenches. In a method of forming a metal line of a semiconductor device, trenches are formed within an insulating layer over a semiconductor substrate. A first barrier metal layer and a second barrier metal layer are formed on a bottom surface of the trenches and on a top surface of the insulating layer. A third barrier metal layer is formed on sidewalls of trenches. A metal line gap-fills the trenches.

Growing community of inventors

Suwon-si, South Korea

Seong Hwan Myung