Lg Electronics Inc.

Samsung Electronics Co., Ltd.

Seong Hoon Jeong

Joon Kui Ahn

Ki Jun Kim

Bong Hoe Kim

Hak Seong Kim

Young Woo Yun

Suk Hyon Yoon

Dong Youn Seo

Jung Hoon Lee

Sung Duk Choi

Dae Won Lee

Kyungin Choi

Sunjung Kim

Taegon Kim

Hyunchul Song

Eun Sun Kim

Sang Heon Lee

Jinbum Kim

Ho Young Kim

Choeun Lee

Sun Min Kwon

Hee Jun Shim

Dong Wook Roh

Seokhoon Kim

Hyun Jung Lee

Woong Seo

Jae Young Park

Hanmei Choi

Seung Hyun Lim

Bonyoung Koo

Byeongchan Lee

Kwan Heum Lee

Jeon Il Lee

Kongsoo Lee

Jinhye Bae

Soo Jung Ryu

Yoongoo Kang

Ho-Kyun An

Hong Bum Park

Jaejong Han

Jungho Yoo

Sungun Kwon

Yu-Jin Pyo

A semiconductor device includes a substrate including a first active pattern and a second active pattern, a device isolation layer filling a first trench between the first and second active patterns, the device isolation layer including a silicon oxide layer doped with helium, a helium concentration of the device isolation layer being higher than a helium concentration of the first and second active patterns, and a gate electrode crossing the first and second active patterns.

Method of fabricating a semiconductor device

Semiconductor device including a densified device isolation layer

Semiconductor device including patterns and layers having different helium concentrations and method of fabricating the same

A semiconductor device is provided including a fin active region on a substrate. The fin active region includes a lower region, a middle region, and an upper region. The middle region has lateral surfaces with a slope less steep than the lateral surfaces of the upper region. An isolation region is on a lateral surface of the lower region of the fin active region. A gate electrode structure is provided. A gate dielectric structure having an oxidation oxide layer and a deposition oxide layer, while having a thickness greater than half a width of the upper region of the fin active region is provided. The deposition oxide layer is between the gate electrode structure and the fin active region and the gate electrode structure and the isolation region, and the oxidation oxide layer is between the fin active region and the deposition oxide layer.

Semiconductor devices including gate dielectric structures

A cache memory and a method of managing the same are provided. The method of managing a cache memory includes determining whether a number of bits of a data bandwidth stored in a bank is an integer multiple of a number of bits of unit data in data to be stored, storing first unit data, among the data to be stored, in a first region of a first address in the bank in response to the number of bits of the data bandwidth not being the integer multiple of the number of bits of the unit data, and storing part of second unit data, among the data to be stored, in a second region of the first address.

Cache memory and method of managing the same

A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-hit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

Method for transmitting control signal using efficient multiplexing

A method of transmitting a control signal using efficient multiplexing is disclosed. The present invention includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-bit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

Provided is a method of processing a texture. The method includes acquiring texture position information in a texture image corresponding to pixel position information of pixels constituting a frame, acquiring texture classification information (TCI) representing a similarity between respective texture factors of two or more classified regions in the texture image based on the texture position information, determining an amount of texture data requested from a memory according to the TCI, and reading texture data corresponding to the determined amount of texture data based on the texture position information.

Method and apparatus for processing texture

A method of manufacturing a semiconductor device includes forming an active pattern protruding from a semiconductor substrate, forming a dummy gate pattern crossing over the active pattern, forming gate spacers on opposite first and second sidewalls of the dummy gate pattern, removing the dummy gate pattern to form a gate region exposing an upper surface and sidewalls of the active pattern between the gate spacers, recessing the upper surface of the active pattern exposed by the gate region to form a channel recess region, forming a channel pattern in the channel recess region by a selective epitaxial growth (SEG) process, and sequentially forming a gate dielectric layer and a gate electrode covering an upper surface and sidewalls of the channel pattern in the gate region. The channel pattern has a lattice constant different from that of the semiconductor substrate.

Semiconductor device and method of manufacturing the same

The inventive concepts provide methods of manufacturing a semiconductor device. The method includes patterning a substrate to form an active pattern, forming a gate pattern intersecting the active pattern, forming a gate spacer on a sidewall of the gate pattern, forming a growth-inhibiting layer covering an upper region of the gate pattern, and forming source/drain electrodes at opposite first and second sides of the gate pattern.

Methods of selectively growing source/drain regions of fin field effect transistor and method of manufacturing semiconductor device including a fin field effect transistor

Semiconductor devices include lower interconnections, upper interconnections crossing over the lower interconnections, selection components disposed at crossing points of the lower interconnections and the upper interconnections, respectively, and memory components disposed between the selection components and the upper interconnections. Each of the selection components may include a semiconductor pattern having a first sidewall and a second sidewall. The first sidewall of the semiconductor pattern may have a first upper width and a first lower width that is greater than the first upper width. The second sidewall of the semiconductor pattern may have a second upper width and a second lower width that is substantially equal to the second upper width.

Semiconductor memory devices having lower and upper interconnections, selection components and memory components

Methods of transmitting a control signal using efficient multiplexing are disclosed. One of the method includes the steps of multiplexing a plurality of 1-bit control signals within a prescribed time-frequency domain by code division multiple access (CDMA) and transmitting the multiplexed control signals, wherein a plurality of the 1-bit control signals include a plurality of the 1-bit control signals for a specific transmitting side. Accordingly, reliability on 1-bit control signal transmission can be enhanced.

A method of transmitting a downlink control signal is disclosed, by which localized allocation and distributed allocation are efficiently used in transmitting a downlink control signal. The present invention includes multiplexing the downlink control signal in a manner of if there exists downlink data transmission to a prescribed UE, applying localized allocation to a transmission of the downlink control signal including the scheduling information on the uplink data transmission of the UE and applying distributed allocation to another transmission of the downlink control signal and transmitting the multiplexed downlink control signal.

Method for transmitting downlink control signal

Growing community of inventors

Anyang-si, South Korea

Seong Hoon Jeong