Other

Amkor Electronics, Inc.

Anam Industrial Co., Ltd.

Seon Goo Lee

A thin, stackable semiconductor package having improved electrical and heat dissipating performance comprises a semiconductor chip having an integrated circuit and a plurality of input/output pads on a surface thereof. A lead frame having a plurality of inner leads with upper and a lower surfaces has one of those surfaces bonded to a surface of the chip with a bonding agent. The leads each has a projection formed on at least one of the upper and lower surfaces at a distal end portion of the lead. Each of the leads is electrically connected to an associated input/output pad of the chip through a wire bonding process using electrically conductive wires, or by a ball bonding process using electrically conductive balls. Alternatively, the leads may be directly bonded to the input/output pads of the chip by a TAB bonding process. An encapsulated portion envelops the semiconductor chip and the leads while exposing the projections of the leads to the atmosphere outside the encapsulated portion. A solder ball is welded to the bottom surface of the projection of each lead and is used as a signal input/output terminal of the package. A chip heat sink may be bonded to the chip to further increase the capacity of the package to dissipate heat away from the chip during operation.

Thin, stackable semiconductor packages

A semiconductor package having a light, thin, simple and compact structure including outer leads having a minimum length and a resin encapsulate having a minimum volume. The semiconductor package includes a package body, a semiconductor chip mounted on a central portion of the body, inner and outer leads bonded to a peripheral portion of an upper surface of the body by an insulating layer in such a manner that the leads are supported on the body, conductive wires or bumps for electrically connecting the inner leads to the semiconductor chip, a resin encapsulate for encapsulating the semiconductor chip, the conductive wires or bumps and the inner leads. Each outer lead has an end positioned at a level higher than an upper surface of the semiconductor chip so that a boundary portion defined between the associated outer and inner leads serves as a barrier for the resin encapsulate. The end of each outer lead is exposed outside the resin encapsulate and extending to a peripheral edge of the body.

Growing community of inventors

Seoul, South Korea

Seon Goo Lee