Samsung Electronics Co., Ltd.

Seokjun Won

Youngmook Oh

Cheolwoo Park

Minwoo Song

HyungSuk Jung

Moonkyun Song

Namgyu Cho

Jeongeon Lee

Kwangyul Lee

Hyunwoo Kim

Yigil Cho

Jinhyeok Jang

Jaeeun Song

Yunho Kim

A filter contamination measuring device includes: a working electrode adjacent to a first surface of a filter, the filter configured to adsorb an ionic material of a first polarity, a counter electrode disposed on the other surface of the filter, a potentiostat configured to apply a voltage of a second polarity to the working electrode for a predetermined period of time, and to measure current output from the working electrode. The potentiostat is configured to increase the voltage over the predetermined amount of time. The filter contamination measuring device further includes a controller configured to calculate a maximum current attained during the predetermined amount of time and a corresponding voltage value, and to determine the type and concentration of the ionic material based on the maximum current and the voltage value.

Filter contamination measuring device, filter assembly including the same, and filter contamination measuring method using the same

A semiconductor device includes a substrate including a first region and a second region, a first gate dielectric layer, a first lower gate electrode, and a first upper gate electrode sequentially stacked on the first region, a second gate dielectric layer, a second lower gate electrode, and a second upper gate electrode sequentially stacked on the second region, a first spacer disposed on a sidewall of the first upper gate electrode, a second spacer disposed on a sidewall of the second upper gate electrode, a third spacer covering the first spacer on the sidewall of the first upper gate electrode, and a fourth spacer covering the second spacer on the sidewall of the second upper gate electrode. At least one of a first sidewall of the first lower gate electrode and a second sidewall of the first lower gate electrode is in contact with the third spacer.

Semiconductor devices and methods for fabricating the same

Provided is a semiconductor device and method of fabricating the same. The device includes a substrate including a first region and a second region, a first gate pattern on the first region, a second gate pattern on the second region, and an interlayer insulating layer enclosing the first and second gate patterns. The first gate pattern including a first gate insulating layer and a first gate electrode, the second gate pattern including a second gate insulating layer and a second gate electrode, the first gate insulating layer is thicker than the second gate insulating layer, and a top width of the second gate pattern is larger than a bottom width thereof.

Semiconductor device and method of fabricating the same

Growing community of inventors

Seoul, South Korea

Seokjun Won