Samsung Electronics Co., Ltd.

Seokjae Lee

Kyoungmin Kim

Sangwook Park

Taehwan Kim

Byungkwon Kang

Donggeon Kim

Inseok Baek

Bokyeon Won

Myeongsik Ryu

Junghwan Choi

Joon Soo Han

Sungho Jang

Bok-Yeon Won

Seungjin Park

Ilgweon Kim

Jinwoo Nam

Kwangsub Byun

Sungjin Son

Taesung Kang

Youngkyu Lee

An electronic apparatus may include: a video processor configured to output a video frame; a graphic processor configured to output a graphic frame; a mixer; and a processor which may be configured to: control the mixer to generate and output a first composite frame based on the video frame and the graphic frame, generate a second composite frame, which comprises a video area corresponding to the video frame and a graphic area corresponding to the graphic frame in a displayed image, and in which the video area and the graphic area have undergone image effect processing, based on an event of the image effect processing, and control the mixer to output the second composite frame.

Electronic device and control method thereof

A memory device includes a memory cell array, a row address decoder configured to generate a plurality of main word line driving signals and a plurality of sub word line driving signals, based on an odd signal representing that a main word line driving signal driving an odd word line is activated, generate a plurality of encoded sub word line driving signals used for driving a target word line by outputting the plurality of sub word line driving signals in a first order, and, based on an even signal representing that a main word line driving signal driving an even word line is activated, generate the plurality of encoded sub word line driving signals by outputting the plurality of sub word line driving signals in a second order, and a word line driving circuit configured to drive the target word line at a first voltage level or a second voltage level.

Memory device including sub word line driving circuit

A sub-word-line driver and semiconductor memory devices including the same are provided. The sub-word-line driver may include a word line pull-up transistor, a word line pull-down transistor, and a keeping transistor configured to maintain a word line at a specified voltage level. The sub-word-line driver may include a peripheral active region on a substrate, a first peripheral gate electrode that corresponds to a gate node of the word line pull-down transistor on the peripheral active region, a second peripheral gate electrode that corresponds to a gate node of the keeping transistor on the peripheral active region, and a first lower contact coupled to a first region of the peripheral active region. A first (VBB) voltage from the first region may be supplied to a source node of the keeping transistor.

Sub-word-line drivers and semiconductor memory devices including the same

Provided are a display apparatus and an operation method thereof for preventing image flicker when displaying mixed images: generating a first image corresponding to video content on a first plane, generating, on a second plane, a second image, outputting a mixed image that is a mixture of the first image and the second image, generating a third image on a third plane corresponding to the mixed image, and displaying the third image based on removal of the first image from the display.

Display apparatus and operation method thereof

An integrated circuit device includes a sense amplifier configured to sense a voltage change of a bit line, wherein the sense amplifier includes: a sense amplifier unit connected to the bit line and a complementary bit line, configured to sense the voltage change of the bit line in response to a control signal, configured to adjust voltages of a sensing bit line and a complementary sensing bit line based on the sensed voltage change, and including a first PMOS transistor and a first NMOS transistor; and a first offset canceling unit connecting the bit line to the complementary sensing bit line in response to an offset canceling signal, and including a first offset canceling transistor arranged between the first NMOS transistor and the first PMOS transistor, wherein the first offset canceling transistor shares a common impurity region with the first NMOS transistor.

Integrated circuit devices

Growing community of inventors

Gwangmyeong-si, South Korea

Seokjae Lee