Skhynix Inc.

Seoul National University

Seok-Min Ye

Deog-Kyoon Jeong

Suhwan Kim

Taek-Sang Song

Han-Kyu Chi

Gi-Moon Hong

Su-hwan Kim

Min-Seong Chu

Woo-Rham Bae

A semiconductor device may include: a variable delay circuit configured to delay a data strobe signal according to a delay control signal and output a delayed data strobe signal; a data sampler configured to compare a level of a reference voltage and a value of a data signal in synchronization with the delayed data strobe signal, and determine a logic level of the value of the data signal, the data signal having a training pattern; and a control circuit configured to determine a delay amount of the data strobe signal and generate the delay control signal and the reference voltage according to an output signal of the data sampler.

Semiconductor device and operating method thereof

An equalizer includes a sampler configured to sample an edge and data of an input signal or an induced signal obtained from the input signal, a clock generator configured to generate an edge clock used to decide sampling timing of the edge and a data clock used to decide sampling timing of the data based on the sampled edge and the sampled data, and a controller configured to control the sampling timing of the edge and the sampling timing of the data based on the sampled edge and the sampled data.

Equalizer and operating method thereof

A receiver includes a fixed delay unit configured to delay a first clock signal received from a clock channel by a predetermined time and output a second clock signal; a first delay unit configured to delay the first clock signal in response to a first control signal; a first data sampler configured to sample a data signal received from a data channel in response to an output signal of the first delay unit and output a first data signal; a second delay unit configured to delay the first data signal in response to a second control signal and output a second data signal; a second data sampler configured to sample the second data signal in response to the second clock signal; and a delay controller configured to output the first control signal and the second control signal.

Receiver, system including the same, and calibration method thereof

Growing community of inventors

Seoul, South Korea

Seok-Min Ye