Samsung Electronics Co., Ltd.

Genitech, Inc.

Seok-Jun Won

Weon-hong Kim

Yong-Kuk Jeong

Min-Woo Song

Dae-Jin Kwon

Dae-jin Kwon

Cha-young Yoo

Jung-Min Park

Young-wook Park

Young-Wook Park

Soon-yeon Park

Ju-Youn Kim

Cha-Young Yoo

Young-Sun Kim

Dae-youn Kim

Yong-min Yoo

Weon-Hong Kim

Young-Hoon Kim

Young-Min Kim

Seung-Hwan Lee

Wan-don Kim

Yun-Jung Lee

Young-Dae Kim

Kyung-hoon Kim

Wan-Don Kim

Kang-soo Chu

Yong-woo Hyung

Se-Jin Shim

Sang-Hyeop Lee

Jin-Seok Choi

Kab-jin Nam

Myong-geun Yoon

You-Chan Jin

Ju-Tae Moon

Kab-Jin Nam

Jong-Ho Lee

Sung-Tae Kim

Jin-Won Kim

Yong-Ho Ha

Ji-Hye Yi

Hyung-suk Jung

Hye-Lan Lee

Ki-yeon Park

Moon-kyun Song

Young-Tak Kim

Chul-Woong Lee

Kook-tae Kim

Ho-Sung Son

Jung-Hyoung Lee

Jung-min Park

Wei-Hsiung Tseng

Dong-Suk Shin

Kyoung-Hoon Kim

June-Hee Lee

Han-jin Lim

Se-Jin Lee

Jae-Gon Lee

Ki-Vin Im

Jin-Yong Kim

In-Sung Park

Hong-Ki Kim

Se-hoon Oh

Jae-Hyun Yeo

Eun-ae Chung

Jung-hee Chung

Pan-Kwi Park

Hyung-Suk Jung

Jae-Hyun Joo

Moon-Han Park

Doo-sup Hwang

Andrew-Tae Kim

Byoung-Hoon Lee

Ho-Kyu Kang

Suk-jin Chung

Young-hoon Kim

Jung-Hee Chung

Geun-Woo Kim

Moon-Kyun Song

Suk-Hoon Kim

Han-mei Choi

Jae-hyun Joo

Soon-Yeon Park

Kyung-Hun Kim

Yong-kuk Jeong

Gyung-hoon Hong

Sun-woo Kwak

Duk-soo Yoon

Sun-Mi Song

Semiconductor device, method for fabricating the same and electronic devices including the semiconductor device are provided. The semiconductor device comprises an interlayer insulating layer formed on a substrate and including a trench, a gate electrode formed in the trench, a first gate spacer formed on a side wall of the gate electrode to have an L shape, a second gate spacer formed on the first gate spacer to have an L shape and having a dielectric constant lower than that of silicon nitride, and a third spacer formed on the second gate spacer.

Semiconductor device, method for fabricating the same, and memory system including the semiconductor device

An apparatus and method for fabricating a semiconductor device using a 4-way valve with improved purge efficiency by improving a gas valve system by preventing dead volume from occurring are provided. The apparatus includes a reaction chamber in which a substrate is processed to fabricate a semiconductor device; a first processing gas supply pipe supplying a first processing gas into the reaction chamber; a 4-way valve having a first inlet, a second inlet, a first outlet, and a second outlet and installed at the first processing gas supply pipe such that the first inlet and the first outlet are connected to the first processing gas supply pipe; a second processing gas supply pipe connected to the second inlet of the 4-way valve to supply a second processing gas; a bypass connected to the second outlet of the 4-way valve; and a gate valve installed at the bypass.

Apparatus including 4-way valve for fabricating semiconductor device, method of controlling valve, and method of fabricating semiconductor device using the apparatus

A method for operating semiconductor manufacturing equipment is provided. The method includes forming a conductive thin film on an inner side surface of a reaction chamber and on a substrate in the reaction chamber, the conductive thin film including a first conductive material, and forming a particle preventive layer on the inner side surface of the reaction chamber in which the conductive thin film is formed.

Method for operating semiconductor manufacturing equipment

In a method of manufacturing a semiconductor device, a dummy gate structure is formed on a substrate. A first spacer layer is formed on the substrate to cover the dummy gate structure. A nitridation process is performed on the first spacer layer. An upper portion of the substrate adjacent to the dummy gate structure is removed to form a trench. An inner wall of the trench is cleaned. An epitaxial layer is formed to fill the trench. The dummy gate structure is replaced with a gate structure.

Methods of manufacturing semiconductor devices

Provided is a method for fabricating a semiconductor device. The method includes forming an interlayer insulating layer on a substrate, the interlayer insulating layer including a first trench; forming a high-k dielectric layer in the first trench; successively forming a diffusion layer and a blocking layer on the high-k dielectric layer; subsequently performing annealing; after the annealing, successively removing the blocking layer and the diffusion layer; forming a first barrier layer on the high-k dielectric layer; successively forming a work function adjustment layer and a gate conductor on the first barrier layer; and forming a capping layer on the gate conductor.

Semiconductor device and method for fabricating the same

Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming an insulating layer that includes a trench therein. The method includes forming a high-k layer in the trench. Moreover, the method includes forming a metal layer on the high-k layer, then performing a first heat treatment at a first temperature, and performing a second heat treatment at a second temperature that is higher than the first temperature.

Methods of forming semiconductor devices, including performing a heat treatment after forming a metal layer and a high-k layer

A semiconductor device includes a first interface film on a first area of a substrate, the first interface film including a first growth interface film and a second growth interface film on a lower portion of the first growth interface film, a first dielectric film on the first interface film, and a first gate electrode on the first dielectric film.

A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon.

Fabricating method of a semiconductor device

A method of fabricating a semiconductor device includes providing a dummy gate insulation film formed on a substrate, the dummy gate insulation film including a first material and providing a spacer formed at least one side of the gate insulation film, the spacer including the first material, removing the first material included in the dummy gate insulation film by a first process, removing the dummy gate insulation film from which the first material has been removed by a second process different from the first process, and sequentially forming a gate insulation film and a gate electrode structure on the substrate.

Method for fabricating semiconductor device

A semiconductor device includes an interlayer insulating film on a substrate, the interlayer insulating film including a trench, a gate insulating film in the trench, a diffusion film on the gate insulating film, the diffusion film including a first diffusion material, a gate metal structure on the diffusion film, the gate metal structure including a second diffusion material, and a diffusion prevention film between the gate metal structure and the diffusion film, the diffusion prevention film being configured to prevent diffusion of the second diffusion material from the gate metal structure, the first diffusion material diffused from the diffusion film exists in the gate insulating film.

Semiconductor device and method of fabricating the same

In a semiconductor integrated circuit device and a method of formation thereof, a semiconductor device comprises: a semiconductor substrate; an insulator at a top portion of the substrate, defining an insulator region; a conductive layer pattern on the substrate, the conductive layer pattern being patterned from a common conductive layer, the conductive layer pattern including a first pattern portion on the insulator in the insulator region and a second pattern portion on the substrate in an active region of the substrate, wherein the second pattern portion comprises a gate of a transistor in the active region; and a capacitor on the insulator in the insulator region, the capacitor including: a lower electrode on the first pattern portion of the conductive layer pattern, a dielectric layer pattern on the lower electrode, and an upper electrode on the dielectric layer pattern.

Semiconductor integrated circuit device having MIM capacitor and method of fabricating the same

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Seoul, South Korea

Seok-Jun Won