Skhynix Inc.

Seok-Jun Lee

Eu-Joon Byun

Byung-Jun Kim

Hye-Mi Kang

With regard to a function group including all or some functions included in one of multiple binary codes stored in the memory device, a binary code including a first function that is executed at a first timepoint is loaded into a first memory area at a second timepoint that precedes the first time point, thereby minimizing the operation delay time of the memory system, and minimizing the overhead occurring in the processing of calling a specific function.

Memory system, memory controller, and method for operating memory system

A memory includes a memory device including plural memory blocks, each memory block including plural pages, and a controller coupled to the memory device and configured to select a target memory block among the plural memory blocks, the target memory block including a first page to an N page (N is a positive integer), and program data in the target memory block, based on a type of the data, either in a first direction from the first page to the N page or in a second direction from the N page to the first page.

Apparatus and method for controlling multi-stream program operations performed in a memory block included in a memory system

A memory system may include: a non-volatile memory device suitable for storing firmware; a volatile memory device comprising a write cache region for temporarily storing write data to be programmed into the non-volatile memory device and a firmware cache region for loading the firmware from the non-volatile memory device; and a controller suitable for: moving, to the write cache region, changeable firmware data that is generated or modified in the firmware cache region during an operation of the controller; programming the changeable firmware data, after it is moved into the write cache region, into the non-volatile memory device; and generating, in the firmware cache region, access information of the changeable firmware data.

Apparatus and method for managing firmware through runtime overlay

A memory system includes a memory device and a controller. The memory device stores a piece of data in a location which is distinguished by a physical address. The controller generates map data, each piece of map data associating a logical address, inputted along with a request from an external device, with the physical address, selects a piece of map data among the map data based on a status regarding the piece of map data, and transfers selected map data to the external device.

Memory system for utilizing a memory included in an external device

A memory system includes a memory device including first memory blocks each including a memory cell storing a 1-bit data, and second memory blocks each including a memory cell storing a multi-bit data. The memory system further includes a controller configured to estimate data input/output speed of an operation requested by an external device and to determine, based on the estimated data input/output speed, a buffering ratio of pieces of buffered data, temporarily stored in the first memory blocks, to pieces of inputted data. The controller uses the buffer ratio to determine whether to program pieces of inputted data into the second memory blocks directly or to buffer the inputted data in the first memory blocks before programming it into the second memory blocks.

Memory system for determining usage of a buffer based on I/O throughput and operation method thereof

A memory system includes a memory device including memory blocks and a memory controller configured to control the memory device. The memory device stores a firmware which includes binaries, and the binaries include a first binary and a second binary. The memory controller loads the firmware to a first region in a working memory, loads the first binary to a second region which is included in the first region, and loads the second binary to a third region which is included in the first region and is different from the second region. The memory controller stores information on an entry function corresponding to a target function included in the second binary, in a fourth region which is different from the first region. A start address of the second region is determined as a fixed value, and a start address of the third region is dynamically determined.

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Seoul, South Korea

Seok-Jun Lee