Hynix Semiconductor Inc.

Seo-Min Kim

Se-Aug Jang

Hong-Seon Yang

Tae-Woo Jung

Hyun-Chul Sohn

Hyung-Soon Park

Cheol-Kyu Bok

Woo-Jin Kim

Young-Bog Kim

Eung-Rim Hwang

Disclosed are a memory device and a method for fabricating the same. The memory device includes: a substrate provided with a trench; a bit line contact junction formed beneath the trench; a plurality of storage node contact junctions formed outside the trench; and a plurality of gate structures each being formed on the substrate disposed between the bit line contact junction and one of the storage node contact junctions. Each sidewall of the trench becomes a part of the individual channels and thus, channel lengths of the transistors in the cell region become elongated. Accordingly, the storage node contact junctions have a decreased level of leakage currents, thereby increasing data retention time.

Memory device and method for fabricating the same

The present invention relates to a semiconductor memory device and a method for fabricating the same. Particularly, the semiconductor memory device includes at least more than two capacitors to decrease the thickness of an insulation layer and increase the size of each capacitor, wherein the thickness of the insulation layer and the size of the capacitor are factors for increasing parasitic capacitance and leakage currents. Also, the two capacitors are arranged diagonally, thereby widening the width of each capacitor formed. Furthermore, in case of forming the double capacitors according to the preferred embodiment of the present invention, an additional reticle is not required to form the contact holes for each capacitor due to their inverted disposition relationship.

Semiconductor memory device and method for fabricating the same

A semiconductor memory device and a method for fabricating the same. Particularly, the semiconductor memory device includes at least two capacitors to decrease the thickness of an insulation layer and increase the size of each capacitor, wherein the thickness of the insulation layer and the size of the capacitor are factors for increasing parasitic capacitance and leakage currents. Also, the two capacitors are arranged diagonally, thereby widening the width of each capacitor formed. Furthermore, in forming double capacitors according to the preferred embodiment of the present invention, an additional reticle is not required to form the contact holes for each capacitor due to their inverted disposition relationship.

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Kyoungki-do, South Korea

Seo-Min Kim