Renesas Electronics Corporation

Senichirou Nagase

Tsuyoshi Kachi

Yoshinori Hoshino

Yasuhiro Okamoto

Takehirou Mariko

In a semiconductor device in a wafer state, an element region and a scribe region are defined in one main surface of a semiconductor substrate. In the element region, a vertical MOS transistor is formed as a semiconductor element. In the scribe region, an n-type column region and a p-type column region are defined. An n-type column resistor is formed in the n-type column region. A p-type column resistor is formed in the p-type column region.

Semiconductor device

In a deep trench DTC reaching a predetermined depth from a first main surface of a semiconductor substrate SUB, a plurality of columnar conductors CCB including plugs PUG and field plates FP are formed. A p type impurity layer PIL is formed along the side wall surface of the deep trench DTC. Between the bottom of the plug PUG and the bottom of the p type impurity layer PIL, the field plate FP and the p type impurity layer PIL are positioned to face each other via an insulating film FIF interposed therebetween. Between the bottom of the p type impurity layer PIL and the bottom of the field plate FP, the field plate FP and an n-type drift layer NDL of the semiconductor substrate SUB are positioned to face each other via the insulating film FIF interposed therebetween.

Semiconductor device and method of manufacturing the same

Provided are a semiconductor device and a manufacturing method therefor that can prevent the breakage of an element and in which the control of impurity amounts is less susceptible to variations in manufacturing processes. A semiconductor substrate has a front surface and includes hole portions extending from the front surface to an inside of the substrate. N-type regions are formed in the semiconductor substrate. At wall surfaces of the hole portions, p-type regions are formed to configure p-n junction with the n-type regions. Each of the p-type regions includes a low-concentration region and a high-concentration region formed at the wall surface of each hole portion. A width of the high-concentration region along the wall surface of the hole portion becomes smaller from the front surface toward a deeper position.

Semiconductor device and manufacturing method therefor

A deep trench which reaches a predetermined depth from one principal surface is formed in an element region of a semiconductor substrate. A TEOS oxide film and a polycrystalline silicon film are formed so as to fill the deep trench. In formation of a MOSFET and in formation of a protective insulating film on/over a surface of an element region by thermal oxidation, a silicon thermal oxide film grows, the TEOS oxide film contracts and the polycrystalline silicon film expands when oxidized and turning into a silicon oxide film, and thereby an embedded insulator is formed in the deep trench.

To provide a semiconductor device equipped with a snubber portion having an improved withstand voltage and capable of reducing a surge voltage at turn-off of an insulated gate field effect transistor portion. The concentration of a first conductivity type impurity in a snubber semiconductor region is greater than that in a drift layer. The thickness of a snubber insulating film between the snubber semiconductor region and a snubber electrode is greater than that of a gate insulating film between a gate electrode and a body region.

Growing community of inventors

Ibaraki, Japan

Senichirou Nagase