Sharp Kabushiki Kaisha Corporation

Seizou Kakimoto

Hiroshi Iwata

Toshimasa Matsuoka

Masayuki Nakano

Shigeki Hayashida

A semiconductor device of the present invention includes: a semiconductor substrate; a deep well region of a first conductivity type, formed in the semiconductor substrate; a plurality of shallow well regions of a second conductivity type, formed in the deep well region; a source region and a drain region of the first conductivity type, respectively formed in the plurality of shallow well regions; a channel region formed between the source region and the drain region; a gate insulating film formed on the channel region; and a gate electrode formed on the gate insulating film, wherein the gate electrode is electrically connected to a corresponding one of the shallow well regions, and the shallow well region is electrically separated from the adjacent shallow well region.

Semiconductor device and method for fabricating the same

A surface-channel MOS transistor comprising; a gate electrode formed on a semiconductor substrate with a gate dielectric film therebetween and source/drain regions formed in the semiconductor substrate wherein the gate electrode is formed at least a polysilicon layer of a thickness of 100 to 200 nm uniformly doped with an impurity and the source/drain regions contains the same impurity in self-alignment with the gate electrode.

Surface-channel metal-oxide semiconductor transistors, their complementary field-effect transistors and method of producing the same

A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.

Semiconductor device having junction depths for reducing short channel effect

A semiconductor device which materializes dynamic threshold operation, on the assumption of the application of a bulk semiconductor substrate. The semiconductor substrate has a first conductivity type well region (,), a source region (,) and a drain region (,) of second conductivity type are made in the vicinity of the surface of the first conductivity type of well region (,), a channel region (,) is provided between these regions (,and,), a gate insulating film (,) and a gate electrode (,) are stacked in order on the channel region (,), and the gate electrode (,) is connected to the well region (,) through the contact hole (not shown in the figure) of the gate insulating film (,). In this transistor, as compared with a conventional SOI substrate, the resistance of the well region (,) can be lowered to about one-tenth.

Growing community of inventors

Nara, Japan

Seizou Kakimoto