Kabushiki Kaisha Daini Seikosha

Seiko Instruments & Electronics Ltd.

Seiko Sasaki

Kazuhiro Asano

An electronic timepiece has a reference signal generator for generating a 1/10 seconds reference signal which is fed to a static counter which counts the 1/10 seconds reference signal and produces a reference count signal. A read only memory stores a system program which executes and controls a time count. An arithmetic and logic unit executes the time count and a random access memory stores the time counting data. A bidirectional data bus line is connected between the random access memory and the static counter, and a decoder is connected to the bidirectional data bus line for decoding the contents of both the random access memory and the static counter and providing corresponding decoded time data signals. A display device responds to the decoded time data signals and indicates the contents of the random access memory and the static counter. A control circuit is connected to the read only memory and coacts therewith to initiate the actions of the randon access memory and the arithmetic and logic unit in response to the reference count signal from the static counter.

Electronic timepiece

An electronic timepiece having multi-functions comprises a quartz oscillation circuit as a time standard signal generating circuit, a dividing circuit for dividing the output signal of said quartz oscillation circuit, a timing pulse generating circuit for generating a timing pulse signal which operates many kinds of circuit blocks as an input signal of one part of the output of said dividing circuit, a ROM-circuit as a program memory for executing multi-function operations of the timepiece and others, a program counter and page counter for renewing an address of said ROM-circuit, a RAM-circuit as a data-memory for memorizing a controlling memory, an operated result and a time information, an operation circuit for executing many kinds of operations, a data comparison and a data transformation, a latch circuit as an output data memory circuit for temporarily memorizing a display data or other necessary output data, a driver circuit for displaying all of or a part of the contents of said latch circuit, an alarm sound combining circuit in which a part of the output signal of said dividing circuit can be applied thereto, and wherein at least a part of the address of said program memory is synchronously driven by a 100 HZ signal.

Electronic timepiece having multi-functions

An electronic timepiece including a ROM program memory for storing a program, a program counter for addressing the program memory, and a RAM data memory. An operating circuit including an arithmetic logic circuit operates on the data. The ROM program memory circuit stores a test program, and the program counter includes preset test means for addressing the test program stored in the ROM program circuit to operate the timepiece according to the test program. The program memory counter also includes jump inhibiting means for inhibiting execution of the operating program stored in the ROM program memory, in response to a jump address.

Circuitry for reducing power consumption in a multi function electronic timepiece utilizes a low frequency signal from the timing pulse generating circuit and a halt signal from the time signal processing circuitry to inhibit the feeding of timing signals to the processing circuitry after the receipt of a halt signal signifying the end of a function routine and until the receipt of the next low frequency signal.

Multi function electronic timepiece

An electronic timepiece having a control circuit for controlling operation of the timepiece circuit, and an input switching circuit. The input switching circuit includes a plurality of manually operable switches, and a programmed logic array for receiving signals from the manually operating switches and for developing output signals applied to the control circuit for controlling the control circuit. The input switching circuit further includes a memory having an input for receiving output signals from the programmed logic array, and an output for applying memory output signals to the input of the programmed logic array. The memory has a delay for delaying control of the control circuit, in response to actuation of the manually operable switches, for an interval sufficient to allow an operation being performed by the timepiece circuit to be completed without being interrupted by actuation of the manually operable switches.

An electronic timepiece circuit including a data memory for storing time information and display information, and an operating circuit which renews the data stored in the data memory circuit. A program memory circuit stores a sequential program for determining generation of control signals supplied to the data memory circuit and the operating circuit. Two different command data systems are stored in the program memory circuit. One command data system consists of controlling commands which carry out time counting, time setting and display functions, and for pointing addresses in the data memory circuit. The other command data system consists of commands for judging conditions, for pointing addresses of the data memory and for pointing the jump address of the programs stored in the program memory circuit.

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Tokyo, Japan

Seiko Sasaki