Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Seiki Goto

Akira Inoue

Shinsuke Watanabe

Akira Ohta

Yoshinobu Sasaki

Ko Kanaya

Kou Kanaya

Shingo Matsuda

A cascode circuit for a high-gain or high-output millimeter-wave device that operates with stability. The cascode circuit including two cascode-connected transistors includes: a first high electron mobility transistor (HEMT) including a source that is grounded; a second HEMT including a source connected to a drain of the first HEMT; a reflection gain restricting resistance connected to the gate of the second HEMT, for restricting reflection gain; and an open stub connected to a side of the reflection gain restricting resistance which is opposite the side connected to the second HEMT, for short-circuiting high-frequency signals at a predetermined frequency and nearby frequencies.

Cascode circuit

A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

Semiconductor device

A cascode circuit includes a first field effect transistor which has a source terminal grounded, a second field effect transistor which has a source terminal connected to a drain terminal of the first field effect transistor, and a first capacitor connected between the source terminal of the first field effect transistor and a gate terminal of the second field effect transistor. The first field effect transistor and the second field effect transistor are cascode-connected successively. A capacitance value of the first capacitor is 0.01 to 10 times that between the gate and source terminals of the second field effect transistor.

Cascode circuit and integrated circuit having it

A semiconductor chip for amplification is connected between input-side and output-side matching circuits, and each of matching circuits includes balanced circuits which receive signals different in phase by 180 degrees, divided from an input signal. The balanced circuits are connected at a virtual grounding point, which is used as a grounding point sensitive to RF characteristics in an IPD. Thus, a semiconductor device can be free from influence of variations of grounding wires and can be reduced in size, weight, and cost.

Semiconductor device having balanced circuit for use in high frequency band

In a high-frequency power amplifier, gate feed portions are formed by dividing a gate feed which connects transistor gate electrodes in parallel, and each of the gate feed portions includes a given number of gate electrodes connected in parallel. Each of transistor cell elements includes a set of the gate electrodes connected in parallel. A resistance wire is interposed between the transistor cell elements to isolate each transistor cell element. The resistance wire and the gate electrodes are made of the same metal material and formed by the same process. Thus, closed loop oscillation of transistors is suppressed with no increase in chip size.

High-frequency power amplifier

A resonance circuit of a transmission line and a capacitor is connected to the base circuit of a transistor. The transmission line is shorter than one-quarter wavelength to make the resonant frequency of the resonant circuit higher than the frequency of a second harmonic. As a result, the angle of the reflection coefficient of the second harmonic when an input matching circuit side is viewed from the input terminal of the transistor ranges from 170&deg; to 270&deg; on a polar chart, and phase difference between the fundamental wave of the base current and the second harmonic decreases.

An internally impedance matched transistor circuit prevents low frequency oscillation during high frequency band operation. Field effect transistors and corresponding oscillation-preventing stabilization circuits are located in the same package with the stabilization circuits close to the corresponding field effect transistors. Each oscillation-preventing stabilization circuit includes a resistor and a capacitor connected in series.

Transistor with internal matching circuit

An impedance matching circuit disposed on one of input and output sides of an element to be evaluated matches I/O impedances of the element. The impedance matching circuit includes a matching substrate having a surface, a main line on the surface, passive circuits having stubs and FETs alternatingly connected in series and electrically connected to the main line to change impedance of the main line, and a plurality of switching FETs connected in series between the main line and the respective passive circuits switched on and off in accordance with characteristics of the element. The impedances of the matching substrate can be changed as required by electrically connecting the passive circuit to the main line by switching of the FETs. Even when a considerable change occurs in the I/O impedances of the element due to fabrication variations and in large signal (non-linear) operation of a power FET, I/O impedances of an evaluating object can be matched easily and promptly by appropriate switching of the FETs.

Impedance matching circuit and thin film measuring prober

A surface acoustic wave (SAW) filter includes a monocrystalline substrate, such as sapphire, having a surface and an epitaxial piezoelectric layer disposed on the surface of the substrate. The piezoelectric layer is a semiconductor material that is relatively heavily doped in regions at the interface between the substrate and the piezoelectric layer. The heavily doped regions functions as electrodes. Because the electrodes at the interface are made of the same material as the piezoelectric layer, there is no disturbance of the crystallinity of the piezoelectric layer during its deposition and thermal stresses during use are substantially reduced.

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Tokyo, Japan

Seiki Goto