Fujitsu Corporation

Seiji Satta

Akira Okamoto

Makoto Hataida

Takayuki Kinoshita

Each chip arranged in each crossbar switch creates and issues, if a packet is input, a log collection packet for collecting a log of the packet. Each chip collects a log related to a transfer of the input packet. Each chip embeds, in the issued log collection packet or a log collection packet transferred from a crossbar switch in a previous stage, the collected log. If a transfer destination of the packet is other than the crossbar switches, each chip stores, in a storage space, the log embedded in the log collection packet and then transfers, to the transfer destination, only an original packet in which the log is deleted. In contrast, if the transfer destination is a crossbar switch, each chip transfers the log collection packet to a crossbar switch in a next stage.

Crossbar switch system

In an information processing apparatus that includes a first and second semiconductor devices that are connected to each other and also includes a system control device that is connected to the first and second semiconductor devices, the timers that are mounted on the semiconductor devices are all synchronized by successively performing a timer correction process between a semiconductor device in which the timer is synchronized and a semiconductor device, adjacent to the semiconductor device, in which the timer is not synchronized, and, when an error occurs in the information processing device, the value in the synchronized timer and the error information are stored in a predetermined register.

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Kawasaki, Japan

Seiji Satta