Fuji Electric Co., Ltd.

Denso Corporation

Fuji Electric Device Technology Co., Ltd.

Fuji Electric Systems Co. Ltd.

Seiji Momota

Hitoshi Abe

Takeshi Fujii

Masahito Otsuki

Tetsutaro Imagawa

Makoto Asai

Soichi Yoshida

Takashi Shiigi

Koh Yoshikawa

Hiroki Wakimoto

Masaki Koyama

Tomoyuki Obata

Tatsuhiko Fujihira

Takashi Yoshimura

Kenji Kouno

Hiromitsu Tanabe

Shigeki Sato

Mitsuaki Kirisawa

Satoshi Kamijima

Yuichi Onozawa

Takeyoshi Nishimura

Takashi Kobayashi

Tadashi Miyasaka

Tomoyuki Yamazaki

Toshiyuki Matsui

Shigeyuki Obinata

Kazutoshi Sugimura

Hiromi Koyama

Akihiro Fukuchi

Naoko Kurata

Masao Yoshino

Kouji Asahi

Fukuchi Akihiro

Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Semiconductor device

Provided is a semiconductor device including: a first trench portion having a predetermined first trench length; a second trench portion having a second trench length longer than the first trench length; a first gate runner portion configured to be electrically connected to an end portion of the first trench portion; and a second gate runner portion configured to be electrically connected to the first gate runner portion and electrically connected to an end portion of the second trench portion. A resistivity per unit length of the first gate runner portion is larger than a resistivity per unit length of the second gate runner portion.

A semiconductor device is preferably excellent in characteristics such as a loss characteristic. Provided is a semiconductor device including a semiconductor substrate, including an upper-surface electrode provided on an upper surface of the semiconductor substrate; an lower-surface electrode provided on a lower surface of the semiconductor substrate; a transistor portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; a first diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; and a second diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode, wherein the first diode portion and the second diode portion have different resistivities in a depth direction of the semiconductor substrate.

Between a source electrode () of a main device () and a current sensing electrode () of a current detection device (), a resistor for detecting current is connected. Dielectric withstand voltage of gate insulator () is larger than a product of the resistor and maximal current flowing through the current detection device () with reverse bias. A diffusion length of a p-body region () of the main device () is shorter than that of a p-body () of the current detection device (). A curvature radius at an end portion of the p-body region () of the main device () is smaller than that of the p-body () of the current detection device (). As a result, at the inverse bias, electric field at the end portion of the p-body region () of the main device () becomes stronger than that of the p-body region () of the current detection device (). Consequently, avalanche breakdown tends to occur earlier in the main devicethan the current detection device ().

An insulated gate semiconductor device includes an insulated gate semiconductor element, an output current detection unit, a voltage detection unit, and a heat generation amount suppression unit. The insulated gate semiconductor element on-operates by receiving a first gate voltage at a control terminal, and switches and outputs an input voltage to a load. The output current detection unit detects an output current to the load. The voltage detection unit detects an on-voltage of the insulated gate semiconductor element. The heat generation amount suppression unit sets a gate voltage to be applied to the control terminal of the insulated gate semiconductor element higher than the first gate voltage in response to the output current exceeding a rated current value and the on-voltage being lower than a first threshold voltage.

Insulated gate semiconductor device including switchable insulated gate semiconductor element

In a trench deeper than a thickness of a p-type base layer and configured by a first trench and a second trench, a second trench positioned at a lower portion is configured by a third trench and a fourth trench. A width of the second trench along an X direction is expanded more than the first trench positioned above the second trench. Along the X direction, the extent to which the second trench is expanded differs for the third trench and the fourth trench. Thus, a width of the lower portion of the trench differs along a Y direction, enabling reduced gate capacitance compared to uniform expansion along a transverse direction of the trench. Further, ON voltage may be reduced and switching capability may be improved.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device that includes a plurality of trench gate structures each having a gate electrode extending in a depth direction of an element, the plurality of trench gate structures including first trench gate structures respectively contributing to control of the element and second trench gate structures respectively not contributing to the control of the element, the semiconductor device including an electrode portion having a potential other than a gate potential, and an electrode pad that is disposed on a front face of a semiconductor substrate, wherein the electrode pad is used as a terminal to apply a predetermined voltage to gate insulator films, in screening that is executed by applying the predetermined voltage to the gate insulator films respectively in contact with the gate electrode connected to the electrode pad and that is executed before the electrode pad is short-circuited to the electrode portion.

A power diode is disclosed wherein it is possible to lower on-voltage by expanding a conducting region at an on time. By applying negative voltage to a plate electrode when turning on a power diode, an inversion layer is formed in a front surface layer of an n drift region sandwiched between a p guard ring region and a p anode region, and the p guard ring region and p anode region are connected by the inversion layer, thereby causing one portion or all of the p guard ring region to function as an active region together with the anode region, and expanding an energization region, thus lowering on-voltage.

A fabrication method of a semiconductor device that includes trench gate structures each having a gate electrode extending in a depth-direction of an element, where first trench gate structures contribute to controlling the element and second trench gate structures do not contribute. The fabrication method includes forming the trench gate structures on a front face of a semiconductor substrate; forming on the front face, an electrode pad connected to the gate electrode of at least one trench gate structure; executing screening by applying a predetermined voltage between the electrode pad and an electrode portion having a potential other than a gate potential, to apply the predetermined voltage to gate insulator films in contact with each gate electrode connected to the electrode pad; and forming the second trench gate structures having the gate electrodes connected to the electrode pad, by short-circuiting the electrode portion to the electrode pad after executing screening.

Fabrication method of semiconductor device, evaluation method of semiconductor device, and semiconductor device

A semiconductor device is disclosed. The semiconductor device is capable of obtaining a high reverse recovery resistant amount by allowing sheet resistance of a peripheral portion in a p type diffusion region that is in contact with a metal electrode through an insulating film on a surface to be as high as possible and reducing an increase in cost if possible. The semiconductor device includes: a p type diffusion region that is disposed in a surface layer of the one main surface of an n type semiconductor substrate; and a voltage-resistant region that surrounds the p type diffusion region.

Semiconductor device having a diffusion region

Some aspects of the invention include a trench gate structure including a p base layer, an nemitter region, a trench, a gate oxide film, and a doped polysilicon gate electrode is provided in an active region. A p-type extension region formed by extending the p base layer to an edge termination structure region can be provided in the circumference of a plurality of trenches. One or more annular outer trenches which are formed at the same time as the plurality of trenches are provided in the p-type extension region. The annular outer trenches can surround all of the trenches. A second gap between the annular outer trench and the outermost trench or between adjacent annular outer trenches is less than a first gap between adjacent trenches.

Growing community of inventors

Matsumoto, Japan

Seiji Momota