Semiconductor Components Industries, LLC

Sanyo Semiconductor Co., Ltd.

Seiji Miyoshi

Tetsuya Okada

Takumi Hosoya

Hiromichi Inenaga

Shiho Arimoto

A power device includes a substrate including a drift layer and having a first region and a second region, the drift layer having impurities of a first type; a switch formed in the first region; a diode formed in the second region; a metal structure formed over a surface of the substrate, the metal structure having a first thickness over the first region of the substrate and a second thickness over the second region of the substrate, the first thickness and second thickness having at least 3 um in thickness difference; and a zone provided in the drift layer in the second region of the substrate, the zone having impurities of a second type that is different from the first type.

Power device with carrier lifetime zone

Provided is a semiconductor device having an anode of a Si-FRD and a cathode of a Si-SBD which are serially connected. The Si-SBD has a junction capacitance whose amount of accumulable charge is equal to or more than an amount of charge occurring at the time of reverse recovery of the Si-FRD, and has a lower breakdown voltage than the Si-FRD does.

Semiconductor device comprising stack of pn junction diode and schottky barrier diode

In a pn junction diode having a conductivity modulating element provided on a first principal surface of a semiconductor substrate, when an impurity concentration of a p type impurity region is lowered to shorten a reverse recovery time, hole injection is suppressed, thereby causing a problem that a forward voltage value is increased at a certain current point. Moreover, introduction of a life time killer to shorten the reverse recovery time leads to a problem of increased leak current. On an n&#x2212; type semiconductor layer that is a single crystal silicon layer, a p type polycrystalline silicon layer (p type polysilicon layer) is provided. Since the polysilicon layer has more grain boundaries than the single crystal silicon layer, an amount of holes injected into the n&#x2212; type semiconductor layer from the p type polysilicon layer in forward voltage application can be suppressed. Moreover, a natural oxide film formed between the n&#x2212; type semiconductor layer and the p type polysilicon layer in formation of the p type polysilicon layer can also reduce the amount of holes injected into the n&#x2212; type semiconductor layer. Thus, a time to extract the holes in reverse voltage application, that is, a reverse recovery time can be shortened without using a life time killer.

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Ora-gun, Japan

Seiji Miyoshi