Kabushiki Kaisha Toshiba

Tokyo Electron Limited

Toshiba Electronic Devices & Storage Corporation

Seiji Inumiya

Kazuhiro Eguchi

Yoshio Ozawa

Akio Kaneko

Katsuyuki Sekine

Motoyuki Sato

Yoshitaka Tsunashima

Masayuki Tanaka

Tomonori Aoyama

Katsuhiko Hieda

Katsuaki Natori

Masato Koyama

Yoshinori Tsuchiya

Tomohiro Saito

Kiyotaka Miyano

Tetsuo Matsuda

Atsushi Yagishita

Toshihiko Iinuma

Hirokazu Ishida

Takuya Kobayashi

Yasumasa Suizu

Ichiro Mizushima

Kazuaki Nakajima

Takashi Shimizu

Kyoichi Suguro

Kazuhide Hasebe

Atsuko Sakata

Akira Nishiyama

Koji Yamakawa

Junichi Wada

Daisuke Matsushita

Koichi Muraoka

Yasushi Nakasaki

Koichi Kato

Daisuke Ikeno

Takuya Sugawara

Mariko Takayanagi

Yuichiro Morozumi

Tetsuya Kai

Dong-Kyun Choi

A semiconductor device according to an embodiment includes a first electrode pad containing copper as a main component and having a thickness equal to or more than 5 &#x3bc;m and less than 50 &#x3bc;m; an electrode layer containing copper as a main component and having a thickness equal to or more than 5 &#x3bc;m and less than 50 &#x3bc;m; and a semiconductor layer provided between the first electrode pad and the electrode layer.

Semiconductor device having electrode pad and electrode layer intervening semiconductor layer inbetween and manufacturing method thereof

A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, a gate electrode, an aluminum oxynitride layer provided between the gate electrode and the second nitride semiconductor layer, a first electrode electrically connected to the first nitride semiconductor layer, a second electrode electrically connected to the first nitride semiconductor layer, a first aluminum nitride layer provided on the second nitride semiconductor layer between the first electrode and the aluminum oxynitride layer, and a second aluminum nitride layer provided on the second nitride semiconductor layer between the second electrode and the aluminum oxynitride layer. The second nitride semiconductor layer has an electron affinity lower than that of the first nitride semiconductor layer. A second electrode sandwiches the gate electrode together with the first electrode.

Semiconductor device and manufacturing method

According to one embodiment, a ferroelectric memory includes a semiconductor layer, an interfacial insulating film formed on the semiconductor layer, a ferroelectric film formed on the interfacial insulating film, and a gate electrode formed on the ferroelectric film, wherein the ferroelectric film is a film which includes a metal that is hafnium (Hf) or zirconium (Zr) and oxygen as the main components and to which an element selected from the group consisting of silicon (Si), magnesium (Mg), aluminum (Al).

Ferroelectric memory and manufacturing method of the same

It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si&#x3c;31/12 above the first gate insulating film, and a second nickel silicide having a composition of Ni/Si&#x2267;31/12 on the second gate insulating film; and segregating aluminum at an interface between the first nickel silicide and the first gate insulating film by diffusing aluminum through the first nickel silicide.

Semiconductor device and method for manufacturing the same

A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by using wet etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing aluminum and another metal element on the first insulating film; forming a high-k insulating film containing at least one of hafnium and zirconium on the second insulating film; forming a metal film on the high-k insulating film; and conducting heat treatment to react the first insulating film and the second insulating film, thereby forming a third insulating film made of a mixture containing aluminum, the another metal element, the constituent element of the substrate, and oxygen.

Semiconductor device manufacturing method

A semiconductor device of the present invention includes: a semiconductor layer; a gate insulation film provided on the semiconductor layer and including at least one of Hf and Zr; and a gate electrode provided on the gate insulation film and including a carbonitride which includes at least one of Hf and Zr.

Semiconductor device and method for manufacturing same

A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate. The device includes the substrate, a first gate insulation film formed on the substrate in the first and second regions, and containing silicon, a second gate insulation film formed on the first gate insulation film in the first region, and containing first metal and oxygen, a third gate insulation film formed on the first gate insulation film in the second region, and containing second metal different from the first metal and oxygen, a fourth gate insulation film formed on the second and third gate insulation films in the first and second regions, and containing hafnium, and a gate electrode layer formed on the fourth gate insulation film in the first and second regions, and containing metal and nitrogen, a thickness of the gate electrode layer formed in the second region being greater than a thickness of the gate electrode layer formed in the first region.

Semiconductor device and method of manufacturing the same

A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.

Semiconductor memory device and method of manufacturing the same

A silicon oxynitride film is formed on entire surface of a semiconductor substrate, a lanthanum oxide film is formed on the silicon oxynitride film and the lanthanum oxide film is removed from a pMOS region. Then, a nitrided hafnium silicate film serving as a highly dielectric film is formed on the entire surface, an aluminum-containing titanium nitride film is formed, a polysilicon film is formed, and the stacked films are patterned into a gate electrode configuration. Next, impurities are introduced into a source/drain region, and an annealing for activating the impurities is utilized to diffuse the aluminum included in the aluminum-containing titanium nitride film to the interface between the silicon oxynitride film and the nitrided hafnium aluminum silicate film in the pMOS region.

A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.

Semiconductor device having a high-dielectric-constant gate insulating film

A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into an insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the substrate, and oxygen.

A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.

Semiconductor device and method of fabricating the same

A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the aluminum oxide film, the third insulating film, the lanthanum oxide film, the high dielectric constant film, the metal film and the second semiconductor film.

Growing community of inventors

Yokohama, Japan

Seiji Inumiya