Hitachi, Ltd.

Hitachi Tobu Semiconductor

Other

Hitachi Tohbu Semiconductor, Ltd.

Akita Electronics Co., Ltd.

Renesas Electronics Corporation

Elpida Memory, Inc.

Hitachi Ulsi Engineering Corp.

Hitachi Hokkai Semiconductor Ltd.

Seiichiro Tsukui

Toshio Sugano

Kensuke Tsuneda

Masayuki Watanabe

Yoshiaki Wakashima

Kiyoshi Inoue

Kunihiko Nishi

Atsushi Nakamura

Aizo Kaneda

Michio Tanimoto

Suguru Sakaguchi

Michiharu Honda

Takeshi Komaru

Tohru Yoshida

Kohji Nagaoka

Kohji Serizawa

Masashi Horiguchi

Masakazu Aoki

Kazumasa Yanagisawa

Toshio Sasaki

Shigeru Suzuki

Takashi Ono

Hiroshi Ikeda

Hirotaka Nishizawa

Toshio Yamada

Masamichi Ishihara

Hidetoshi Iwai

Yasunori Yamaguchi

Tomohiko Sato

Masahiro Yamamura

Jiro Sawada

Tadao Kaji

Minoru Shinohara

Takashi Araki

Noboru Shiozawa

Shinobu Takeura

Norihiko Kasai

Ichirou Anjou

Tomibumi Inoue

Masakatsu Goto

Yoshiaki Anata

Yasushi Sekine

Tetsuji Kohara

Sadao Morita

Tomoyoshi Miura

Mutsuo Tsukuda

Kouji Nagaoka

In a POP type semiconductor device comprising a second semiconductor package as an upper package stacked on a first semiconductor package as a lower package, a plurality of main surface-side lands formed on a first wiring substrate of the first semiconductor package are disposed distributively on both sides of a chip mounting region as a boundary positioned at a central part of a main surface of the first wiring substrate, thus permitting the adoption of a through molding method. Consequently, a first sealing body formed on the main surface of the first wiring substrate in the first semiconductor package as a lower package extends from one second side of the first wiring substrate toward a central part of the other second side of the same substrate.

Semiconductor device and method for manufacturing the same

To arrange semiconductor parts such as chip resistors and the like between a BGA and a mounting substrate, an interposes is disposed between the BGA and the mounting substrate for mounting the BGA thereon. The interposer serves to maintain the distance between the mounting substrate and the BGA to be just as large as or larger than the thickness of the semiconductor parts and to electrically connect solder balls of the BGA and electrically conductive patterns of the mounting substrate. The semiconductor parts are mounted on the mounting substrate before fixing the BGAto the interposer.

Mounting structure for semiconductor parts and semiconductor device

A memory module MM, in which a module wiring substrate is equipped with function switching means KK and KK for arbitrarily switching function switching signals to be inputted to function switching pins FP and FP of memories . By these function switching means KK and KK , moreover, the function switching signals are arbitrarily switched from any of no connection, a supply voltage Vcc and a ground potential Vss. These signals are inputted altogether to all the mounted memories to switch and arbitrarily set functions including reading modes and refresh cycles.

Semiconductor device and process for manufacturing the same

A memory TCP loaded with four chips (1-bank 16-bit type) is constructed by a tape of one two-layer wiring layer structure, four chips mounted to this tape, etc. Common signal terminals are arranged on one set of two opposed sides, and an independent signal terminal is arranged on another side. The common signal terminals on the two sides are electrically connected to each other common signal wiring. Further, in a DIMM in which this memory TCP is mounted to front and rear sides of a substrate, plural external terminals are formed on one long side of the rectangular substrate, and the memory TCP is mounted such that the independent signal terminal of the memory TCP is arranged along an arranging direction of these external terminals.

Semiconductor device, a semiconductor module loaded with said semiconductor device and a method of manufacturing said semiconductor device

A memory module MM, in which a module wiring substrate,is equipped with function switching means KK,and KK,for arbitrarily switching function switching signals to be inputted to function switching pins FP,and FP,of memories,By these function switching means KK,and KK,moreover, the function switching signals are arbitrarily switched from any of no connection, a supply voltage Vcc and a ground potential Vss. These signals are inputted altogether to all the mounted memories,to switch and arbitrarily set functions including reading modes and refresh cycles.

A memory module MM, in which a module wiring substrate,is equipped with function switching means KK,and KK,for arbitrarily switching function switching signals to be inputted to function switching pins FP,and FP,of memories,. By these function switching means KK,and KK,, moreover, the function switching signals are arbitrarily switched from any of no connection, a supply voltage Vcc and a ground potential Vss. These signals are inputted altogether to all the mounted memories,to switch and arbitrarily set functions including reading modes and refresh cycles.

Semiconductor integrated circuit device, and process and apparatus for

In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Semiconductor memory module having double-sided stacked memory chip

Input/output terminals of a first semiconductor memory device in which failures or defects exist in units of memory mats and input/output terminals of a second semiconductor memory device having redundant memory mats are connected to one another on a mounted substrate to thereby relieve the failures in the memory mat units. A power source is substantially cut off from supplying to a faulty memory mat.

Semiconductor memory device and memory module using the same

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and a large capacity while minimizing the mounting area. In order to achieve this memory, the TAB (Tape Automated Bonding) of the prior art is mounted on an electrically conductive connector, and a plurality of structures composed of the TAB and the connector are stacked. Moreover, the connector mounting the TAB thereon is constructed such that the independent terminals of the stacked TABs may not be shorted.

Stacked semiconductor memory device and semiconductor memory module

A module board has a supporting plate and slender lead pins having their first portions arranged substantially in parallel with one another on a plane substantially coplanar with the supporting plate. The supporting plate and the first portions of the slender lead pins are sandwiched between electrically insulating layer members. The supporting plate and the first portions of the lead pins are isolated from one another with an electrically insulating material between the pair of electrically insulating layer members. Second portions of the lead pins protrude from the pair of electrically insulating layer members. Through holes are provided one for each of the lead pins and through hole conductors are formed on the inner walls of the through holes. Each of the through hole conductors passes through the pair of electrically insulating layer members and the first portion of its associated one of the lead pins and is in electrical connection with a pattern of electrical conductors provided on the pair of electrically insulating layer members, thereby fixing its associated lead pin to the board and electrically connecting its associated lead pin to the pattern of electrical conductors.

High packing density module board and electronic device having such

Semiconductor stacked device

Semiconductor device and semiconductor module with a plurality of

Growing community of inventors

Sayama, Japan

Seiichiro Tsukui