Hitachi, Ltd.

Hitachi Vlsi Engineering Corp.

Seiichi Ueda

Hideo Sato

Kazuo Kato

Tatsuji Matsuura

Eiki Imaizumi

Ryushi Shimokawa

Yasuji Kamata

Kenkichi Yamashita

Toshiro Tsukada

Hiroshi Sato

Kunihiko Usui

Yuichi Nakatani

A voltage comparator is provided including a differential amplifier, first, second and third switches, and first and second capacitors. A fourth switch is connected in series between the second and third switches and an input terminal of the differential amplifier. A first input voltage is sampled and held at the first capacitor through the first switch and at the second capacitor through the second and fourth switches, respectively. Thereafter, since the third switch is turned on and the fourth switch is turned off, the first input voltage is sampled and held at the input capacitor of the differential amplifier. Thereafter, the third switch is turned off and the fourth switch turned on. As a result, an on and off operation of the fourth switch is controlled so that a second input voltage which has been sampled at the second capacitor immediately before the switch is turned off is applied to the input capacitor of the differential amplifier.

Voltage comparator

Herein disclosed are an amplifier and a display which uses the former. The amplifier includes a current amplifying circuit for sending out an amplified output current varying according to an input signal, and a current-voltage converting circuit for converting the output current of the current amplifying circuit into a voltage thereby to generate a high output voltage in response to the input signal. The supply voltage V.sub.cc1 of the current amplifying means and the supply voltage V.sub.cc2 of the current-voltage converting means are set separately of each other to have a relationship of V.sub.cc1 &lt;V.sub.cc2. Thus, a high output voltage can be obtained from the current-voltage converting circuit without the need for the current amplifying means to have high breakdown voltage elements.

Amplifier and display using the former

In a serial-parallel A/D converter, at least two sets of comparators are provided for the conversion of the low-order bits and are operated in a cyclic fashion. Since the subsequent input can be subjected to the A/D conversion without waiting for the determination of the low-order bits, the conversion speed is increased.

Analog-to-digital converter

Growing community of inventors

Takasaki, Japan

Seiichi Ueda